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Memory Mapped In-line DC Current Sensor

IP.com Disclosure Number: IPCOM000012649D
Original Publication Date: 2003-May-19
Included in the Prior Art Database: 2003-May-19
Document File: 3 page(s) / 78K

Publishing Venue

IBM

Abstract

A simple and fast memory mapped current sensor is presented using voltage comparators, a latch, and various passives. In contrast to Analog to Digital converter solutions, this system is comparatively inexpensive and extremely fast, but suffers from decreased accuracy. This simple current sensor is useful in applications such as motor drives and uninterruptible power supplies, where knowing load current may not be necessary for operation, but predefined current trip points are present which indicate certain fault scenarios.

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Memory Mapped In-line DC Current Sensor

   A direct digital output current sensor is presented for use in systems that use a single resistive element in the negative supply lead to sense current in a system. This invention details the apparatus and specifics of the implementation of a high speed digital current sensor that could be used to provide feedback to controls when current draw exceeds predefined limits. The output of this sensor is digital logic level signals, one for each limit exceeded. This resistor is a typical low-ohm precision shunt. This multi-level current monitoring is of great importance in motor drive applications where there are situations where a motor is temporarily driven above nameplate ratings.

What is proposed is a memory mapped interface where an array of comparators are used to drive bits on a data bus. We will use this in a primary referenced configuration, but optical isolation can also be provided, eliminating the need to put A/D signals across a SELV (safety extra low voltage) boundary (such solutions tend to be slow and expensive). While this invention does not pretend to have the resolution of a traditional A/D. It can have a significant "speed to implementation cost" advantage. The bus can be read much more frequently and with less overhead than a traditional A/D converter.

Figure - System implementation.

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Explanation of above circuit:

1.) Current flowing through the load induces a voltage on "Rsense"
2). This voltage...