Browse Prior Art Database

Accurate and Unbiased CPU Utilization Statistics for MP Machines

IP.com Disclosure Number: IPCOM000012949D
Original Publication Date: 2000-Jan-01
Included in the Prior Art Database: 2003-Jun-11
Document File: 4 page(s) / 33K

Publishing Venue

IBM

Abstract

Disclosed here is a methodology for extracting accurate and unbiased per CPU utilization data in an SMP (Symmetric Multi-Processing) environment. Typical CPU idle/busy accounting is sample based (as is the case with most UNIX* variants) and is therefore not accurate for measuring small changes in utilization. Another method is to actually measure the amount of idle loop activity. Previous approaches provided an alternate, replacement idle loop which increments an idle counter when the machine is not busy. However, this approach results in OS (Operating System) scheduling deviations which, therefore, also biases the actual idle activity. The methodology disclosed here includes using a per CPU "idle" counter which is incremented (by each CPU) while in the OS's idle loop and includes a technique whereby an atomic counter increment is achieved which avoids constant use of hardware locking (which, when used by multiple CPU's, severely biases the idle measurement) resulting in accurate, repeatable, and unbiased per CPU and aggregate CPU utilization measurements. In the approach described here, the idle counter increment is inserted into the existing CPU idle procedure. Additionally, a calibration routine is included in the OS initialization code which determines the maximum idle counter increment rate for a truly 100% idle CPU. This max rate is then used as the basis for determining actual CPU utilization during normal operation.

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Accurate and Unbiased CPU Utilization Statistics for MP Machines

Disclosed here is a methodology for extracting accurate and unbiased per CPU
utilization data in an SMP (Symmetric Multi-Processing) environment.

Typical CPU idle/busy accounting is sample based
(as is the case with most UNIX* variants) and is
therefore not accurate for measuring small changes
in utilization. Another method is to actually
measure the amount of idle loop activity. Previous
approaches provided an alternate, replacement idle
loop which increments an idle counter when the
machine is not busy. However, this approach results
in OS (Operating System) scheduling deviations
which, therefore, also biases the actual idle
activity.

The methodology disclosed here includes using a per
CPU "idle" counter which is incremented (by each
CPU) while in the OS's idle loop and includes a
technique whereby an atomic counter increment is
achieved which avoids constant use of hardware
locking (which, when used by multiple CPU's,
severely biases the idle measurement) resulting in
accurate, repeatable, and unbiased per CPU and
aggregate CPU utilization measurements.

In the approach described here, the idle counter
increment is inserted into the existing CPU idle
procedure. Additionally, a calibration routine is
included in the OS initialization code which
determines the maximum idle counter increment rate
for a truly 100% idle CPU. This max rate is then
used as the basis for determining actual CPU
utilization during normal operation.

Usually, the load/increment/store operation, used
to increment a counter, must be an atomic operation
in order to guarantee valid counter reads by a
querying process. Additionally, idle loop counters
must be of sufficient length to eliminate the
possibility of counter wrap. For current
implementations with clock rates less than 1GHz,
idle increment rates may easily be on the order of
2 to several 10's of MHz. For instance, with an
increment rate of 2MHz, a 32 bit counter will wrap
approximately every 1/2 hour on a fully idle
machine. Therefore a wider counter must be used.
However, for 32 bit architectures, longer than 32
bit counter writes occur as two, non-atomic store
instructions. Imposing the restriction of a single
writer on the idle...