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COMMON GATE INPUT STAGE FOR OPTICAL RECEIVER

IP.com Disclosure Number: IPCOM000013186D
Original Publication Date: 2000-Oct-01
Included in the Prior Art Database: 2003-Jun-17
Document File: 2 page(s) / 51K

Publishing Venue

IBM

Abstract

A photo device amplifier employing a common gate input stage is disclosed. The common gate stage eliminates a potential peaking and oscillation problem found in wideband receivers using a feedback configuration. As shown in the figure, photo device 15 is biased by source resistor 1 connected to supply 16, and sink resistor 2 connected to ground 17. Photo device 15 conducts current in response to light falling on it. The photo device signal current is coupled through capacitors 3 and 4 to the source terminals 19 and 20 of Field Effect Transistors (FETs) 7 and 8. The signal current passes through FETs 7 and 8 to the load resistors 10 and 11. The voltage developed across the load resistors, available at outputs 12 and 13, is the differential output voltage of the common gate amplifier stage. For good energy transfer, a high percentage of the photo device's signal current must pass through the FETs to load resistors 10 and 11. For this reason, the resistance of source 1 and sink 2 must be large compared to the resistance at FET sources 19 and

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COMMON GATE INPUT STAGE FOR OPTICAL RECEIVER

  A photo device amplifier employing a common gate input stage is disclosed. The common gate stage eliminates a potential peaking and oscillation problem found in wideband receivers using a feedback configuration.

As shown in the figure, photo device 15 is biased by source resistor 1 connected to supply 16, and sink resistor 2 connected to ground 17. Photo device 15 conducts current in response to light falling on it.

The photo device signal current is coupled through capacitors 3 and 4 to the source terminals 19 and 20 of Field Effect Transistors (FETs) 7 and 8. The signal current passes through FETs 7 and 8 to the load resistors 10 and 11. The voltage developed across the load resistors, available at outputs 12 and 13, is the differential output voltage of the common gate amplifier stage.

For good energy transfer, a high percentage of the photo device's signal current must pass through the FETs to load resistors 10 and 11. For this reason, the resistance of source 1 and sink 2 must be large compared to the resistance at FET sources 19 and
20. The function of current sources 5 and 6 is to bias FETs 7 and 8 at a high enough DC current that the FETs have low source resistances.

Reference voltage 9 ensures that the FETs have the correct voltage bias at their gate terminals.

More voltage gain stages can be added at output 19 and 20, which will cause longer delay time through the amplifier. But, since there is no feedback pa...