Browse Prior Art Database

Simultaneous Dual link transfer from Single Host to Single Target using Serial Storage Architecture (SSA)

IP.com Disclosure Number: IPCOM000013342D
Original Publication Date: 2000-Aug-01
Included in the Prior Art Database: 2003-Jun-18
Document File: 2 page(s) / 37K

Publishing Venue

IBM

Abstract

Disclosed is a process that will double the data rate to a single device on an SSA loop by transferring data from a single host down both paths of the loop to the target.

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  Simultaneous Dual link transfer from Single Host to Single Target using Serial Storage Architecture (SSA)

   Disclosed is a process that will double the data rate to a single device on
an SSA loop by transferring data from a single host down both paths of the loop
to the target.

   Currently data is transferred to a single SSA target from a host using only
the path that results in the shortest number of hops from the host to the target.
The other path to the target is only used if the primary path is disabled by some
error. For targets requiring high data rates such as a high speed printer, both
paths from the host to the target can be used to double the throughput and halve
the response time for large read or write requests to the target.

   The process described uses two SSA adapters in the host device, with a
controlling program that submits a write request to both adapters describing the
same data to be sent to a single target. The target can link those requests
using a reference identifier, and request data from both adapters at the same
time in order to maximize data transfer rates.

   For example, the entire size of a write request may be 1 MB. The target can
request the first 32k bytes of data from one adapter and then immediately request
the second 32k bytes of data from the second adapter. These data transfers will
take place at the same time on both paths to the target. Given a target that can
receive data into its buffers at more than double the rate of a single link, the
target...