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Data recovery method for DAM error

IP.com Disclosure Number: IPCOM000013365D
Original Publication Date: 1999-Sep-01
Included in the Prior Art Database: 2003-Jun-18
Document File: 2 page(s) / 28K

Publishing Venue

IBM

Related People

Katoh, K: AUTHOR [+3]

Abstract

···This article describes a data recovery system when DAM (data address mark) is not · ··found at a sector reading, to use pseudo DAM generator of read/write channel, modulator and demodulator of ···read/write channel or same as read/write channel, ECC (Error correcting code) and CRC (Cyclic redundancy check). The block diagram of the data recovery system is shown as Fig.1. At first, recorded data onto media (disk etc. is read out by GMR (Giant Magnet Resistive) Head, Pre-AMP (amplifier PR (Partial Response) Equalizer, ML (Maximum likelihood) decoder, and demodulator. When DAM is not found and pseudo DAM is found, modulation code storer (1) stores the modulation data into RAM (Random access memory) and then modulation code shifter reads previously stored data from RAM and shifts 1 bit to left and transfers the data as modulation data (6) Then demodulator receives the modulation data and send to DRIVE CONTROL logic as data (2). Then DRIVE CONTROL logic send the data to ECC/CRC logic (3) and RAM (4) Then ECC/CRC logic checks the data is correctable or not. If correctable, ECC/CRC modify the stored data and finish read operation (5) If not correctable, Modulation code shifter read previously shifted data saved by DRIVE CONTROL logic from RAM and shift 1 bit to left as modulation data. These operation is iterated till correctable data can be readout. Fig.1 Modulation Data Maximum |Partial |Pre| +---|Demodulator|<--+-----------+---|Likelihood|<-|Response |<-|AMP|<-|GMR-Head| A Decoding |Equalizer| |(1) |(6)

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Data recovery method for DAM error

···This article describes a data recovery system when DAM (data address mark) is not
· ··found at a sector reading, to use pseudo DAM generator of read/write channel, modulator and
demodulator of
···read/write channel or same as read/write channel, ECC (Error correcting code) and CRC (Cyclic
redundancy check).

The block diagram of the data recovery system is shown as Fig.1.
At first, recorded data onto media (disk etc. is read out by GMR (Giant Magnet Resistive)
Head, Pre-AMP (amplifier PR (Partial Response) Equalizer, ML (Maximum likelihood) decoder,
and demodulator. When DAM is not found and pseudo DAM is found, modulation code storer (1)
stores the modulation data into RAM (Random access memory) and then modulation code shifter
reads previously stored data from RAM and shifts 1 bit to left and transfers the data as
modulation data (6) Then demodulator receives the modulation data and send to DRIVE CONTROL
logic as data (2). Then DRIVE CONTROL logic send the data to ECC/CRC logic (3) and RAM (4) Then
ECC/CRC logic checks the data is correctable or not. If correctable, ECC/CRC modify the stored
data and finish read operation (5) If not correctable, Modulation code shifter read previously
shifted data saved by DRIVE CONTROL logic from RAM and shift 1 bit to left as modulation data.
These operation is iterated till correctable data can be readout.

Fig.1

        +-----------+ +----------+ +---------+ +---+ +--------+
| | Modulation Data | Maximum | |Partial | |Pre| | |
+---|Demodulator|<--+-----------+---|Likelihood|<-|Response |<-|AMP|<-|GMR-Head|
| | | | A | Decoding | |Equalizer| | | | |
| +-----------+ | | +----------+ +---------+ +---+ +--------+
| |(1) |(6)
=== |=========...