Browse Prior Art Database

Hardware Assisted Serial Burst Write

IP.com Disclosure Number: IPCOM000013756D
Original Publication Date: 2000-Jan-01
Included in the Prior Art Database: 2003-Jun-18
Document File: 1 page(s) / 31K

Publishing Venue

IBM

Abstract

Disclosed is a Serial Burst Write (SBW) method for transferring data from a controller module to an external module across a serial communication line assisted by the controller in order to reduce burden of the microprocessor as much as possible.

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Hardware Assisted Serial Burst Write

  Disclosed is a Serial Burst Write (SBW) method for transferring
data from a controller
module to an external module across a serial communication line
assisted by the controller
in order to reduce burden of the microprocessor as much as
possible.

   Microprocessor constructs the SBW table on any memory area in a
format shown below, where

   DATAx is the data to be transferred, and ADDRx is the address of
the destination of
where DATAx should be written to. Maximum size of the table
could be defined as desired.

   STARTADR and STOPADR points the address of the SBW table. Serial
Burst Write operation is
started whenever STARTADR value is not equal to the value of
STOPADR. STARTADR is incremented
by the controller after every write operation and the operation
continues until this value
is equal to that of STOPADR. Microprocessor is allowed to update
both contents
and size of the table, or the STOPADR value at any time. By
utilizing this method, the
microprocessor dedicates its processing time only to the
construction of the SBW table.

   Therefore, once the serial burst write has been started, the
microprocessor is freed to
proceed to the next process.

Example of Serial Burst Write Table

DATA(bit15-8


)

ADDR(bit7-0)

DATA0 ADDR0 <- STARTADR
DATA1 ADDR1
: :
DATAn ADDRn <- STOPADR

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