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INTERCONNECTION SYSTEM AND METHOD FOR IMPLEMENTING ANY COMPLEX COMBINATORIAL LOGIC FUNCTION BY A SINGLE STRING OF TRANSFER LOGIC CELLS

IP.com Disclosure Number: IPCOM000013771D
Original Publication Date: 2000-Dec-01
Included in the Prior Art Database: 2003-Jun-18
Document File: 5 page(s) / 194K

Publishing Venue

IBM

Abstract

New non-logic modes of operation of the Transfer Logic Cell (TLC) circuit and a method for implementing any complex combinatorial logic function with a plurality of TLC circuits arranged forming a linear string are disclosed. Logic circuits built with the disclosed method are characterized in that they are formed by groups of TLC circuits whereas all TLC circuits on every group are straightforward cascaded, being dual-rail outputs of one circuit directly connected to dual-rail inputs of the next, while contiguous groups are interconnected by a TLC circuit operating in one of five disclosed non-logic (interconnection) modes of operation, namely: ‘LEFT-RIGHT’, ‘RIGHT-LEFT’, ‘LEFT-PASS’, ‘RIGHT-PASS’ and ‘TRANSPARENT-CROSS’. Major problems when implementing logic have been determined by the capability to realize the numerous connections between the generally simple logic blocks available on a standard Gate Array or the more complex ones of FPGAs. For a given technology and process, the wiring has been the major contributor in limiting the quantity of logic that can actually be used and the speed at which the logic will be able to operate. On published European patent application EP 1 005 162 entitled: "Circuit and Method for Implementing Combinatorial Logic Functions", by the same author, a Transfer Logic Cell (TLC) circuit has been disclosed, as shown in Fig.1A. Basically, a TLC circuit performs logic elementary operations between a dual-rail input 100 and a dual-rail output 120 from at least one control terminal 110, selecting a mode of operation among four possible logic modes, namely: a ‘PASS’ logic mode of operation 130 in which the information present on the dual rail input is transferred, unaffected, to the dual-rail output; a ‘LEFT’ logic mode of operation 140 in which the information present on the left rail of the input is duplicated onto the dual-rail output; a ‘CROSS’ logic mode of operation 150 in which the information present on the dual rail input is swapped onto the dual rail-output; a ‘RIGHT’ logic mode of operation 160 in which the information present on the right rail of the input is duplicated onto the dual rail output.

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  INTERCONNECTION SYSTEM AND METHOD FOR IMPLEMENTING ANY COMPLEX COMBINATORIAL LOGIC FUNCTION BY A SINGLE STRING OF TRANSFER LOGIC CELLS

New non-logic modes of operation of the Transfer Logic Cell (TLC) circuit and a method for implementing any complex combinatorial logic function with a plurality of TLC circuits arranged forming a linear string are disclosed. Logic circuits built with the disclosed method are characterized in that they are formed by groups of TLC circuits whereas all TLC circuits on every group are straightforward cascaded, being dual-rail outputs of one circuit directly connected to dual-rail inputs of the next, while contiguous groups are interconnected by a TLC circuit operating in one of five disclosed non-logic (interconnection) modes of operation, namely: 'LEFT-RIGHT', 'RIGHT-LEFT', 'LEFT-PASS', 'RIGHT-PASS' and 'TRANSPARENT-CROSS'.

Major problems when implementing logic have been determined by the capability to realize the numerous connections between the generally simple logic blocks available on a standard Gate Array or the more complex ones of FPGAs. For a given technology and process, the wiring has been the major contributor in limiting the quantity of logic that can actually be used and the speed at which the logic will be able to operate.

On published European patent application EP 1 005 162 entitled: "Circuit and Method for Implementing Combinatorial Logic Functions", by the same author, a Transfer Logic Cell (TLC) circuit has been disclosed, as shown in Fig.1A. Basically, a TLC circuit performs logic elementary operations between a dual-rail input 100 and a dual-rail output 120 from at least one control terminal 110, selecting a mode of operation among four possible logic modes, namely:

a 'PASS' logic mode of operation 130 in which the information present on the dual rail input is transferred, unaffected, to the dual-rail output; a 'LEFT' logic mode of operation 140 in which the information present on the left rail of the input is duplicated onto the dual-rail output; a 'CROSS' logic mode of operation 150 in which the information present on the dual rail input is swapped onto the dual rail-output; a 'RIGHT' logic mode of operation 160 in which the information present on the right rail of the input is duplicated onto the dual rail output.

Or, from two non-logic modes of operation:

an 'ISOLATION' non-logic mode of operation 170 in which the dual rail output is permanently disabled; a 'TRANSPARENT PASS' non-logic mode of operation 180 in which dual-rail input and dual-rail output are permanently connected.

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130

Li Ri

Lo Ro

100

P

PASS

L R

L R

Li Ri

LEFT

L R

L L

110

CROSS

L R

R L

140Pass Left

Cross Right

RIGHT

L R

R R

TLC

150

L

C

Lo Ro

120Prior Art

180

170 160

None

None

Logic modes

R

Transparent

pass Isolation

Figure 1A

None

None

None

None

None

As illustrated on Fig. 2, the referenced method permits a straightforward cascading of TLCs to form basic wide logic operators (e.g., AND operators 2...