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Improved Silicon Nitride Isotropic Etch for Trench Local Oxidation Process

IP.com Disclosure Number: IPCOM000013881D
Original Publication Date: 2000-Feb-01
Included in the Prior Art Database: 2003-Jun-18
Document File: 2 page(s) / 43K

Publishing Venue

IBM

Abstract

The process flow will be described by reference to the drawing which shows a silicon structure referenced 10.

This text was extracted from a PDF file.
This is the abbreviated version, containing approximately 100% of the total text.

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Improved Silicon Nitride Isotropic Etch for Trench Local Oxidation Process

The process flow will be described by reference to the drawing which shows a silicon structure referenced 10.

   A trench 11 is etched into silicon substrate 12. A thin (2 nm) silicon oxide layer 13 and a thin (5nm) silicon nitride (Si3N4) layer 14 are deposited on the structure by LPCVD . Next, 2µ thick resist layer 15 is blanket deposited onto the structure 10 to fill the trench 11 in excess, then recessed to the desired depth
(1.2 µm). At this stage of the process, the Si3N4 layer 14 in trench 11 must be etched without affecting the resist layer 15 and the oxide layer 13.

   To that end, an improved selective etch process has been developed which is particulary adapted for use with the isotropic etch chamber of a RPS system manufactured and commercialized by APPLIED MATERIAL Inc , SANTA CLARA , CA , USA. .

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The adequate operating conditions for this process are given below :

O2 : 70 sccm CF4 : 35 sccm N2 : 80 sccm He : 30 sccm Pressure : 538 mTorr Power : 600 W Wall temperature : 65°C Cathode temperature : 25°C

   The thin oxide layer 13 is used to protect the silicon trench 11 sidewall from undesired lateral etching. After the etch step has been completed the thin oxide layer 13 is removed by a conventional wet etch chemistry. Finally, the resist is stripped and the exposed silicon material at the upper part of the trench 11 is oxidized.

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