Browse Prior Art Database

Charge Transfer Amplifier with High Operating Margin

IP.com Disclosure Number: IPCOM000013926D
Original Publication Date: 2000-Aug-01
Included in the Prior Art Database: 2003-Jun-19
Document File: 1 page(s) / 60K

Publishing Venue

IBM

Abstract

Disclosed is a charge transfer amplifier with high operating margin. This amplifier has additional pre-charge circuit to raise pre-charge voltage level and to prevent input/output nodes from staying a high impedance state during evaluation period. It can enlarge operating margin by reducing cross-talk noise effect from neighbor bus lines. EV Figure 1 Figure 2 Figure 1 shows charge transfer amplifier with the additional pre-charge circuit. Figure 2 shows timing chart of "High"/"Low" amplification. Conventional charge transfer amplifier consists of TN0,TN1 and TP0. "PC" signal goes low and stays low during pre-charge period therefore "OUT" node is pre-charged at VDD and "IN" node is pre-charged at voltage reference (Vref) minus TN1 threshold voltage (Vtn1). In the case of "High" amplification, "EV" signal stays low during evaluation period then charge transfer doesn't occur therefore "OUT" node stays at VDD and "IN" node stays at (Vref-Vtn1) but both nodes are in a high impedance state. In the case of "Low" amplification, "EV" goes high and stays high during evaluation period then charge transfer occurs therefore "IN"/"OUT" nodes go to GND level. When "EV" returns to GND, "IN" node returns to (Vref-Vtn1) and "OUT" node returns to VDD.

This text was extracted from a PDF file.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 67% of the total text.

Page 1 of 1

Charge Transfer Amplifier with High Operating Margin

Disclosed is a charge transfer amplifier with high operating margin. This amplifier has additional
pre-charge circuit to raise pre-charge voltage level and to prevent input/output nodes from staying a
high impedance state during evaluation period. It can enlarge operating margin by reducing cross-talk
noise effect from neighbor bus lines.

EV

Figure 1 Figure 2

Figure 1 shows charge transfer amplifier with the additional pre-charge circuit. Figure 2 shows
timing chart of "High"/"Low" amplification. Conventional charge transfer amplifier consists of
TN0,TN1 and TP0. "PC" signal goes low and stays low during pre-charge period therefore "OUT" node is
pre-charged at VDD and "IN" node is pre-charged at voltage reference (Vref) minus TN1 threshold
voltage (Vtn1). In the case of "High" amplification, "EV" signal stays low during evaluation period
then charge transfer doesn't occur therefore "OUT" node stays at VDD and "IN" node stays at
(Vref-Vtn1) but both nodes are in a high impedance state. In the case of "Low" amplification, "EV"
goes high and stays high during evaluation period then charge transfer occurs therefore "IN"/"OUT"
nodes go to GND level. When "EV" returns to GND, "IN" node returns to (Vref-Vtn1) and "OUT" node
returns to VDD.

In the case of "High" amplification, "IN"/"OUT" nodes are in a high impedance state during evaluation
period. Once "IN" node goes low in some degree but enough to turn "OUT" node into low by cro...