Browse Prior Art Database

Use of Resume Program instruction to assist in debugging programs in z/Architecture machines

IP.com Disclosure Number: IPCOM000014076D
Original Publication Date: 2001-Oct-29
Included in the Prior Art Database: 2003-Jun-19
Document File: 3 page(s) / 54K

Publishing Venue

IBM

Abstract

The problem was how to give control to a target program with the correct 64 bit registers and PSW from another task that is debugging the target.

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  Use of Resume Program instruction to assist in debugging programs in z/Architecture machines

    The problem was how to give control to a target program with the correct 64 bit registers and PSW from another task that is debugging the target.

In the past this has been done by using the facilites of the TEST SVC (SVC 97) to update the registers of the target task but the new z/Architecture has introduced 64 bit registers and the SVC did not have the ability to update the new parts of the registers.

As changing the SVC was not practical , I came up with the idea of using the SVC to give control to a small piece of code (I will call this 'transfer code') that would run as part of the target task. This transfer code operates in AMODE 31 and only requires the older 32 bit parts of the registers and the TEST SVC is able to do this; the transfer code then accesses a common area and uses values from that area to update the entire 64 bits of all the registers, then as a final step it uses the Resume Program instruction to update the Program Status Word with the target program's current address.

The end result is that the target program sees the correct 64 bit registers and the correct PSW without having to change the TEST SVC. In fact there are advantages over using the SVC as the transfer code has the advantage of being able to update all of the registers of the target - the new 64 bit general purpose registers, all of the floating point registers, the floating point control...