Browse Prior Art Database

Net fault detection and localization on fully assembled cards

IP.com Disclosure Number: IPCOM000014204D
Original Publication Date: 2000-Jun-01
Included in the Prior Art Database: 2003-Jun-19
Document File: 4 page(s) / 54K

Publishing Venue

IBM

Abstract

Post Disclosure Text Drawings Enter any additional information relating to this disclosure below: 1. BACKGROUND High density cards contains a high number of active and passive components and thousands of nets interconnecting these components.

This text was extracted from a PDF file.
This is the abbreviated version, containing approximately 52% of the total text.

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Net fault detection and localization on fully assembled cards

Post Disclosure Text & Drawings

Enter any additional information relating to this disclosure below:

1. BACKGROUND

 High density cards contains a high number
of active and passive components and
thousands of nets interconnecting these
components.

 The scope of the invention is a test
procedure for assembled cards, but it
also covers raw cards.

 Each net has a given set of
characteristics:
. Length from one node to another
. DC characteristics of the components
(internal pull up for
instance)

. AC characteristics of the components
(input capacitance for
instance)

. Characteristic impedance and losses of
the PCB (Printed

Circuit Board) trace

 The net is liable to be subject to
different kinds of problems:
. Severe process problems resulting in
open, short to power
plane, short to adjacent nets
. More subtle problems like resistive
traces, characteristic
impedance Z0 out of specification,
components with no contact
or resistive contact to the PCB

The test of cards which implements some
modules using the BGA (Ball Grid Array)
package technology with 624 I/O's and more
, showed that a lot of problems were
caused by the lack of contact on module
I/O's. The only other mean to detect this
kind of default is to perform an X Ray
inspection.

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2. TIME DOMAIN REFLECTOMETRY (TDR)

  TDR employs a step generator and an
oscilloscope in a system. The voltage step
is propagated down the transmission line
under investigation. The incident voltage
has a rise time as small as possible, such
as 100 ps rise time.

 The TDR technique reveals the position
and the nature of each discontinuity along
the line.

3. TEST PROCEDURE

 The voltage step may be applied on any
PCB via of the net through a cable. The
oscilloscope displays the reflected
voltage of the cable in serial with the
net under analysis.

 The interpretation of the reflected wave
forms allows to

1) Locate where is the problem or the
deviation
2) Identify the nature of the problem

 Since the net may be complex with a lot
of nodes, branches and attached
components, it is highly recommended to
gather net signatures on a golden card.

 According to test environment, the tested
card net signature could be automatically
compared to the golden one.

4. INTERPRETATION

 The time when the si...