Browse Prior Art Database

BI-MODALLY SHIFTABLE SCAN CHAIN

IP.com Disclosure Number: IPCOM000014236D
Original Publication Date: 2000-Jan-01
Included in the Prior Art Database: 2003-Jun-19
Document File: 3 page(s) / 87K

Publishing Venue

IBM

Abstract

Title: Bi-modally Shiftable Scan Chain

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BI-MODALLY SHIFTABLE SCAN CHAIN

Title: Bi-modally Shiftable Scan Chain

Problem:

Scan based designs depend on serially loading and
unloading the system latches or Shift Register
Latches (SRLs) to support the structural test
methodology and interface with the logic within the
device. When the scan chain is defective or
"broken", basic access to the device is limited and
quick accurate diagnosability becomes a severe
problem. This disclosure proposes a solution for
diagnosing stuck-at scan chains to the failing
Shift Register Latch (SRL) by bypassing the
defective portion of the scan chain without
impacting system performance. This logic fault
localization enables Physical Fail Diagnostic (PFA)
to identify the root cause of the defect.

Solution:

The basic solution consists of combining a design
modification to the scan chain to allow for
reconfigurability during the shifting operation.
This enables the scan chain to be loaded and
unloaded in one of two modes, either as a full scan
chain, or as a two partial scan chains as shown in
Fig. 3 and Fig. 5.

Fig. 3 - Bi-modal Scan Chain Configuration

SRI SRO

A1-clk A2-clk B-clk

M U X

RSL 1

RSL 2

RSL 3

RSL 4

RSL 5

RSL 6

RSL 7

MUX

MUX

SRI SRO

A1-clk A2-clk B-clk

RSL 1

RSL 2

RSL 3

RSL 4

RSL 5

RSL 6

RSL 7

SRI SRO

A1-clk A2-clk B-clk

RSL 1

RSL 2

RSL 3

RSL 4

RSL 5

RSL 6

RSL 7

Fig. 5 - Normal & Alternate Shift Mode

1

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Specifically, the output of each Shift Register
Latch (SRL) is fed to the two subsequent SRLs in
the scan chain, rather than just to the next SRL as
in a typical scan chain configuration shown in Fig.
2
. The addition of another scan A2-clock allows
the selection of the input to the SRL from either
of the two predecessor SRLs. This new scan chain
and clocking configuration is shown in Fig. 4.

SRL1 SRL2 SRLn-1 SRLn

Fig. 2 - Typical LSSD Scan Chain

SRI

c1-clk a-clk b-clk

(c2)

Scan

L1

Data

Scan

L1

Data

Scan

L1

Data

Scan

L1

Data

SRO

L2

L2

L2

L2

SRL j SRL j+1

Fig. 4 - Bi-modal SRL Pair

  From SRL j -2

  From SRL j -1

   To SRL j +2

   To SRL j +2

In the normal full scan chain mode of operation the
A1-clock shifts the data from the previous L2 latch
or Shift Register Input (SRI) into the L1 latch,
while the B-clock shifts the data from the previous
L1 latch into the L2 latch or Shift Register Output
(SRO)....