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Method and Apparatus for On Chip Measurement of Path Sensitive Ring Oscillator

IP.com Disclosure Number: IPCOM000014724D
Original Publication Date: 2000-Nov-01
Included in the Prior Art Database: 2003-Jun-20
Document File: 2 page(s) / 44K

Publishing Venue

IBM

Abstract

Disclosed is a technique to measure a Path Sensitive Ring Oscillator (PSRO) within a VLSI chip without an external oscilloscope. PSRO delays are used as indicators to show where a chip lies within the manufacturing process.

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  Method and Apparatus for On Chip Measurement of Path Sensitive Ring Oscillator

    Disclosed is a technique to measure a Path Sensitive Ring Oscillator (PSRO) within a VLSI chip without an external oscilloscope. PSRO delays are used as indicators to show where a chip lies within the manufacturing process.

Generally PSRO delays are measured by one of two methods:

1. Wire the PSRO circuit to a module IO, wire the module IO to a card connector, through a resistor set wire the PSRO connector IO to a high level for circuit activation, attach a probe from an oscilloscope to the connector IO, and observe and record the period of the PSRO waveform.

2. Find the chip number (if visible) and find the manufacturer's data (which may or may not exist) that shows the chip PSRO values for chip numbers.

On Chip PSRO Measurement Circuit

   Clock PSRO_out

Count

read

Counting

+ 1

Count

PSRO_out

The figure above shows the basic design of the chip PSRO measurement logic. The PSRO measurement logic counts the number of internal chip clock cycles when the PSRO output is high or low. For this case, it counts how many cycles the PSRO output is high. The three inputs are:

1. Count -- a control signal indicating when to measure the PSRO delay
2. PSRO_out -- output of PSRO circuit
3. Clock -- internal Clock within the VLSI chip

Count is active when the PSRO measurement function is activated and is raised high when the PSRO output is low and is lowered when the PSRO output transitions from a high to a...