Browse Prior Art Database

Data level Protection

IP.com Disclosure Number: IPCOM000014854D
Original Publication Date: 2001-May-01
Included in the Prior Art Database: 2003-Jun-20
Document File: 1 page(s) / 35K

Publishing Venue

IBM

Abstract

Disclosed is a method and apparatus for providing data level protection in a computing environment. Provides real time protection for data in storage. The apparatus is an additional set of regs (registers) that correspond to the general purpose regs. These will be called data regs in the rest of the article. There is also a global mode indicator (PSW bit in S/390 terms) that will indicate whether or not data protection is active. If protection is active the CPU will check any data reg that corresponds to a general purpose reg that is being used by the current instruction. If the data reg is filled in (IE non-zero) the hardware will compare some offset in the storage (defined by the hardware) pointed to by the general purpose reg with the value in the data reg. If they are not equal an exception will be raised. If the values match another hardware defined offset in the data area will contain the length of the area. If an instruction attempts to access storage outside this area a different exception is raised. If the mode bit is off or the data reg is zero, all checking is bypassed. The method to implement this protection in the software could be handled by the various compilers. A program level switch can be set to tell the compiler if data level protection is to be used or not. Each data area being defined would also indicate if they support data level protection along with the token and length to be used. The compilers could then generate the code needed to load/clear the data regs in the program. 1

This text was extracted from a PDF file.
This is the abbreviated version, containing approximately 96% of the total text.

Page 1 of 1

Data level Protection

   Disclosed is a method and apparatus for providing data level protection in a computing environment. Provides real time protection for data in storage. The apparatus is an additional set of regs (registers) that correspond to the general purpose regs. These will be called data regs in the rest of the article. There is also a global mode indicator (PSW bit in S/390 terms) that will indicate whether or not data protection is active. If protection is active the CPU will check any data reg that corresponds to a general purpose reg that is being used by the current instruction. If the data reg is filled in (IE non-zero) the hardware will compare some offset in the storage (defined by the hardware) pointed to by the general purpose reg with the value in the data reg. If they are not equal an exception will be raised. If the values match another hardware defined offset in the data area will contain the length of the area. If an instruction attempts to access storage outside this area a different exception is raised. If the mode bit is off or the data reg is zero, all checking is bypassed. The method to implement this protection in the software could be handled by the various compilers. A program level switch can be set to tell the compiler if data level protection is to be used or not. Each data area being defined would also indicate if they support data level protection along with the token and length to be used. The compilers could then generate t...