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Method and Apparatus for Reducing Noise in CMOS Domino Circuits Employing a NOR gate Output Stage.

IP.com Disclosure Number: IPCOM000014878D
Original Publication Date: 2000-Feb-01
Included in the Prior Art Database: 2003-Jun-20
Document File: 2 page(s) / 62K

Publishing Venue

IBM

Abstract

Domino circuits using NOR gates in the output stage are useful for combining much functionality into one circuit. It is advantageous to design that output stage as shown in the figure. The NOR gate consists of N0, N1, P0_A, P1_A, P1_B, and P0_B. This disclosure adds transistors N99 and N100 to the NOR gate output stage, a solution which prevents two problems. Without those transistors node OUTPUT would be susceptible to a large noise spike up from ground due to charge sharing when either PRECHARGE1 or PRECHARGE2 goes low while the other stays high. In this case, residual charge located on node INT1 or node INT2 will be transferred to node OUTPUT, causing it's voltage to spike up, which can cause other succeeding domino circuits to fail. N99 and N100 prevent that problem by discharging INT1 and INT2 during the precharge phase, so the charge sharing never happens. The other problem when N99 and N100 are not present is that any downwards noise on the either PRECHARGE1 or PRECHARGE2 during the evaluate phase can also cause node OUTPUT to spike up. N99 and N100 prevent that. For example, if PRECHARGE 1 goes low, any slight drop from Vdd on PRECHARGE2 may show up as a spike up on node OUTPUT when N100 is absent. The presence of N100 helps keep node INT2 low, which prevents the spike on OUTPUT. Alternatively, when PRECHARGE2 falls low while PRECHARGE1 stays high but experiences a slight drop, N99 helps prevent that noise from showing up on OUTPUT. Effectively the Beta ratio of the output stage is being reduced to make the NOR stage filter noise better, but at the same time no charge sharing is possible in the output stage. The circuit has both noise suppression and noise rejection. 1 2

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  Method and Apparatus for Reducing Noise in CMOS Domino Circuits Employing a NOR gate Output Stage.

  Domino circuits using NOR gates in the output stage are useful for combining much functionality into one circuit. It is advantageous to design that output stage as shown in the figure. The NOR gate consists of N0, N1, P0_A, P1_A, P1_B, and P0_B. This disclosure adds transistors N99 and N100 to the NOR gate output stage, a solution which prevents two problems. Without those transistors node OUTPUT would be susceptible to a large noise spike up from ground due to charge sharing when either PRECHARGE1 or PRECHARGE2 goes low while the other stays high. In this case, residual charge located on node INT1 or node INT2 will be transferred to node OUTPUT, causing it's voltage to spike up, which can cause other succeeding domino circuits to fail. N99 and N100 prevent that problem by discharging INT1 and INT2 during the precharge phase, so the charge sharing never happens. The other problem when N99 and N100 are not present is that any downwards noise on the either PRECHARGE1 or PRECHARGE2 during the evaluate phase can also cause node OUTPUT to spike up. N99 and N100 prevent that. For example, if PRECHARGE 1 goes low, any slight drop from Vdd on PRECHARGE2 may show up as a spike up on node OUTPUT when N100 is absent. The presence of N100 helps keep node INT2 low, which prevents the spike on OUTPUT. Alternatively, when PRECHARGE2 falls low while PRECHARGE1 stays high but experi...