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Communication System Using Scalable Parallel Non-Uniform Memory Access, with Address Translation, for Parallel Processing Systems

IP.com Disclosure Number: IPCOM000015014D
Original Publication Date: 2002-Jan-11
Included in the Prior Art Database: 2003-Jun-20
Document File: 5 page(s) / 38K

Publishing Venue

IBM

Abstract

This proposal relates to the field of high-performance computing, and in particular to the field of parallel processing , which involves the use of many closely-coupled processor/cache/memory subsystems in parallel to solve computing problems more quickly than can be solved on a single processor/cache/memory subsystem.

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  Communication System Using Scalable Parallel Non-Uniform Memory Access, with Address Translation, for Parallel Processing Systems

     This proposal relates to the field of high-performance
computing, and in particular to the field of parallel processing
, which involves the use of many closely-coupled
processor/cache/memory subsystems in parallel to solve computing
problems more quickly than can be solved on a single
processor/cache/memory subsystem.

To a large extent, the performance of many parallel processing
applications depends strongly on the communications within the
parallel processing system. Two important issues in the field of
communications within parallel processing systems include (1) the
ability to move small and large amounts of data quickly from one
processor, where it is generated, to one or more other
processors, where the data is used, and on (2) the ease of
programming the parallel system, such that all
processor/cache/memory subsystems can be effectively programmed
to work efficiently together.

Currently, the field of communications within parallel processing
systems can be broadly divided into systems using two mechanisms
- non-coherent communications, and coherent communications.

"Non-coherent communications" involve processor-to-processor
communications for data where the processors and their associated
operating systems address distinct (separate) address spaces.
Since the processors address different address spaces, the
address where the data is generated in the source processor is
unrelated to the address that it is referenced by in the
destination processor, so different fields to associate the data
in the source and destination processors. Examples of
non-coherent processor-to-processor communications range from
systems with processors connected through a LAN or WAN using
TCP/IP protocols to transport data, to more tightly coupled
systems, which use more optimized, high-performance protocols -
commonly called "message-passing".

"Coherent communications" involve processor-to-processor
communications where the processors and their respective
operating systems share a common address space. These systems are
more tightly coupled, since source and destination processors
address data using the same addresses. Currently-implemented
examples include systems where all processor have the same access
capability to all memory, termed SMP or UMA systems, and systems
where individual ranges of memory are more tightly coupled to

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individual processors, termed NUMA (Non-Uniform Memory Access) or
COMA (Cache-only Memory Access) systems.

A method of programming systems using non-coherent communications
involves explicit communications operations, to package data,
send it across the inter-processor communications network, and
unpack it at the destination. The most commonly used interface is
termed "sockets", and involves the paradigm of a stream of bytes
which is written by the source processor, and read by the
destination processor. Typically, the "so...