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Method for specifying short defect position of gate and common buslines after patterning second metal layer in TFT-LCDs

IP.com Disclosure Number: IPCOM000015427D
Original Publication Date: 2002-Aug-01
Included in the Prior Art Database: 2003-Jun-20
Document File: 2 page(s) / 57K

Publishing Venue

IBM

Abstract

1 Figure 1 This article describes two methods for specifying position of short circuit between gate-line and common-line in AMLCDs with which common-lines and gate-lines are placed by turns in the same layer in parallel and which all common-lines are tied together in left and right edges with negligible low resistance. These methods enable to correct the defect at low cost. Figure 1 shows the short circuit in the AMLCDs. The gate-line resistance (terminal GL to GR) and common-line resistance (terminal CL to CR) are expressed as Rg and Rc in the following descriptions. The two methods are as follows.

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  Method for specifying short defect position of gate and common buslines after patterning second metal layer in TFT-LCDs

1

Figure 1

This article describes two methods for specifying position of short circuit between gate-line and common-line in AMLCDs with which common-lines and gate-lines are placed by turns in the same layer in parallel and which all common-lines are tied together in left and right edges with negligible low resistance. These methods enable to correct the defect at low cost.

Figure 1 shows the short circuit in the AMLCDs. The gate-line resistance (terminal GL to GR) and common-line resistance (terminal CL to CR) are expressed as Rg and Rc in the following descriptions. The two methods are as follows.

(1) CL to GL resistance measurement Based on a measured resistance R1 between the terminals CL and GL as shown in Figure 1, the relative position (x ) of the short circuit is approximated as follow.

R1 = Rc' + x Rg where Rc' = ( 1- x ) x Rc is approximated under Nc >> 1. 2R1 = - x Rc + x (Rc + Rg)


2x = { Rc + Rg ยท [ (Rc + Rg) - 4 Rc R1 ]1/2 }/ 2 Rc ( 0 < x < 1 )

x

Common (#1)

Gate-line

Gate-line

Common (#Nc)

......

Common

Common

CL CR

GL GR

Gate-line ......


thus

1

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(2) CL to GR resistance measurement Based on a measured resistance R2 between the terminals CL and GR as shown in Figure 1, the relative position (x ) of the short circuit is approximated as follow.

R2 = Rc' + ( 1 - x ) Rg...