Browse Prior Art Database

Re-bootable system after the wrong Flash BIOS ROM updating

IP.com Disclosure Number: IPCOM000015565D
Original Publication Date: 2002-Jan-26
Included in the Prior Art Database: 2003-Jun-20
Document File: 3 page(s) / 79K

Publishing Venue

IBM

Abstract

Disclosed is a method for PC boot up in the condition of the damaged BIOS ROM program for reason of power fail during BIOS ROM updating.

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Re-bootable system after the wrong Flash BIOS ROM updating

Disclosed is a method for PC boot up in the condition of the damaged BIOS ROM program for reason of power fail during BIOS ROM updating.

A PC has the BIOS (Basic Input Output System) ROM that is able to update, erase and rewrite the data and the internal programs because almost all BIOS ROMs are made of Flash type ROM. This program includes initialize programs for the PC hardware system. Then, if the BIOS program update is failed, this PC will not boot up at all. For a Desktop PC, a user who wants to boot up the ROM updated PC can change a BIOS ROM address to the back up BIOS ROM address by using an onboard jumper under the BIOS ROM update fail condition. But in the notebook PC, there is no onboard jumper because notebook PC has no space to install a jumper switch. Then, if the BIOS program update is failed, this notebook PC does not boot up at all without any alternative methods.

This disclosure is how to avoid re-boot fail at wrong BIOS ROM updating without any jumper.

In general, the PC system is hung up and the watch dog timer is activated while the CPU executes invalid program, but the watch dog timer only issues an error information to the PC system. Then, if the watch dog timer work with ROM address change and CPU reset, the notebook PC is able to boot up under wrong BIOS ROM program.

The main idea of this disclosure is that an invalid CPU code activate the WDT, Watch Dog Timer, which work with ROM address change, jump code-1 to jump code-2, and CPU re-start. Following is the BIOS ROM address map and the boot up recovery sequence.

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Flash B IO S R O M m em ory m ap for x86 fam iliy C PU .

0xFFFF:FFFF

O ffset=0x:FFF0 C P U start adress after pow er on reset.

Jum p C ode-1

BIOS RO M -1 (Include
Jum p C ode-1 B oot C ode-1)

B oot C ode-1

(W D T clear)

Jum p C ode-2

BIO S RO M -2 (Include
Jum p C ode...