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# A Small Symmetric-key Crypto-Hardware

IP.com Disclosure Number: IPCOM000015655D
Original Publication Date: 2002-Jul-20
Included in the Prior Art Database: 2003-Jun-20
Document File: 1 page(s) / 56K

IBM

## Abstract

·Disclosed is a circuit for a symmetric cipher using a Feistel structure. In order to reduce the gate count, one S-box is implemented and is repeatedly used by switching the input data. When, n S-boxes are used, the right half of the data is divided into n words, and they are sequentially fed into the S-box. The permutation function is a linear transformation with an n-word input and an n-word output.

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A Small Symmetric-key Crypto-Hardware

·Disclosed is a circuit for a symmetric cipher using a Feistel
structure.

In order to reduce the gate count, one S-box is implemented and
is repeatedly used by switching the input data.

When, n S-boxes are used, the right half of the data is divided
into n words, and they are sequentially fed into the S-box.

The permutation function is a linear transformation with an
n-word input and an n-word output.

One of the input words is assigned to the S-box output, and '0'
data is fed to the other (n-1) word input.

This means that the S-box output word is expanded to n-word
data.

The S-box is used n times for the encryption (or the
decryption) round function, thus (n blocks) * (n-words) worth
of data is produced.

Then the n-word XOR logic of the Feistel structure is
repeatedly used to sum up these n-blocks data into the left
half of the data register.

Sbox

2:1

2:1

Data Register

Data Register

Key

Key

Sbox

n:1

Permutation

Sbox

00

n:1

Permutation

n:1

1

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