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Circuit Allowing a 5V PCI Device on the Same Bus as Non-5V-Tolerant 3.3V PCI or PCIX Device

IP.com Disclosure Number: IPCOM000016024D
Original Publication Date: 2002-Nov-30
Included in the Prior Art Database: 2003-Jun-21
Document File: 2 page(s) / 48K

Publishing Venue

IBM

Abstract

Disclosed is a device allowing a 5V PCI device on the same bus as a Non-5V-Tolerant 3.3V PCI or PCIX device. This circuit design will limit both the voltage and current seen by the interfacing chip and allow for 5V PCI 33MHz operation while not limiting such quantities to disable the function of the 5V module. Implementation of this circuit provides for greater electrical stability/performance and an increase in system flexibility.

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  Circuit Allowing a 5V PCI Device on the Same Bus as Non-5V-Tolerant 3.3V PCI or PCIX Device

   Disclosed is a device allowing a 5V PCI device on the same bus as a Non-5V-Tolerant 3.3V PCI or PCIX device. This circuit design will limit both the voltage and current seen by the interfacing chip and allow for 5V PCI 33MHz operation while not limiting such quantities to disable the function of the 5V module. Implementation of this circuit provides for greater electrical stability/performance and an increase in system flexibility.

A typical 3.3V tolerant PCI device may face reliability issues when receiving an incoming signal from a 5V PCI device due to over voltage/current. This circuit solves the problem by limiting both the voltage and current seen by the 3.3V interfacing chip allowing for 5V PCI 33MHz operation. The additional circuity operates as a clamp when the higher voltage is present on the interface. When a 5.0V device is present on the bus and is driving any one of its signals back towards the interfacing module, the circuit is activated and clamps the 5.0V signal to something the interfacing chip can handle, i.e., 3.3V - 3.6V. It performs the clamping by using a network of resistors and high-speed schottky diodes connected to different voltage sources. A schematic shown in the figure depicts one implementation of the circuit described above.

At DC, the node located between the two schottky diodes labeled Vref, will be approximately 3.0V, assuming a 0.5V volta...