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Selecting Command Type (Read or Write) to Increase SDRAM Bandwidth for Any Access Pattern

IP.com Disclosure Number: IPCOM000016263D
Original Publication Date: 2002-Sep-25
Included in the Prior Art Database: 2003-Jun-21
Document File: 3 page(s) / 45K

Publishing Venue

IBM

Abstract

Disclosed is a method for selecting the command type (read or write) to increase SDRAM bandwidth for any access pattern. This can be used as part of a memory access arbitration scheme. At the heart of this method is the Waste Equation. This method does not maintain ordering: some other mechanism is needed to resolve access dependencies and latency issues.

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  Selecting Command Type (Read or Write) to Increase SDRAM Bandwidth for Any Access Pattern

   Disclosed is a method for selecting the command type (read or write) to increase SDRAM bandwidth for any access pattern. This can be used as part of a memory access arbitration scheme. At the heart of this method is the Waste Equation. This method does not maintain ordering: some other mechanism is needed to resolve access dependencies and latency issues.

This method uses one counter per SDRAM bank to keep track of how many cycles until that bank is free (and therefore a new command can be issued to it). These counters are called Bank Idle counters. Another counter called the Till Next Read counter is used to keep track of the required command spacing between the just-issued command and when the next read can be issued. Another counter called the Till Next Write counter is used to keep track of the required command spacing between the just-issued command and when the next write can be issued.

Accesses arrive and are classified by type and target bank. Size information also accompanies each access. There are eight slots (assuming the SDRAM has four banks): Read for Bank A, Read for Bank B, Read for Bank C, Read for Bank D, Write for Bank A, Write for Bank B, Write for Bank C, and Write for Bank D. There is a pool for each slot, with one access from the pool occupying the slot. The accesses that occupy the slots are the pending commands. Any combination of the slots may be occupied at any time.

Maximum bandwidth is achieved by minimizing the number of non-data cycles on the SDRAM interface. Each cycle all the pending commands are considered, reads versus writes. The Waste Equation is used to calculate the non-data cycles due to continuing with the current type of command (say, reads) and completing the pending commands of this type. It is also used to calculate the non-data cycles due to switching over and doing the other type of command (writes in this case) and completing the pending commands of this type. The results are then compared. The winning command type is that which yields the fewest non-data cycles. Once the command type is selected, some other mechanism determines exactly which command of that type that can be issued is issued, if more than one is possible.

The following are the variables for the Waste Equation ('waste' used to mean non-data cycles). All variables have the unit of 'cycles'. The Size (S) information comes from the size information that accompanies the pending commands. The Time Until Activate (TA) information comes from the Bank Idle counters. The Command Spacing (CS) information comes from the Till Next Read and Till Next Write counters. Note that a sort on TA is required before using the Waste Equation. If one slot for a command type is not occupied, then the TA3 term is removed from the equation. If two slots for a command type are not occupied, then the TA3 and TA2 terms are removed, and so on. If no slots for a...