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AIX520: Balancing Memory Resources

IP.com Disclosure Number: IPCOM000016322D
Original Publication Date: 2002-Nov-24
Included in the Prior Art Database: 2003-Jun-21
Document File: 2 page(s) / 44K

Publishing Venue

IBM

Abstract

Disclosed is a method for balancing memory resources in a dynamic logical partitioning (DLPAR) computer system. In large memory/CPU systems for AIX*, memory is divided into several discrete domains called mempools, of approximately equal size. Each mempool has its own page replacement thread that will run on its domain of memory as necessary. On a DLPAR system, when the amount of resources (CPU and memory) change, it may be the case that one mempool has significantly more memory than another, or that there are too many or too few mempools for the amount of memory or number of CPUs in the system. So changes were made to allow memory to be moved from one mempool to another, and to allow the creation and deletion of mempools at run time. Because a significant amount of processing may be needed to move memory between mempools, it is also desirable that this be done as infrequently as possible while still maintaining balance. So rather than allocate the memory for each mempool in a contiguous block, the memory known to AIX is striped across mempools in chunks such that the removal of one Logical Memory Block (LMB) will remove memory from all mempools in the system, thus maintaining balance. When memory is added, it is added in chunks to the smallest mempool (determined at the time each chunk is added), thus preserving balance. Despite striping memory through the mempools, it will still be necessary to rebalance occasionally. Rebalancing memory between mempools involves the following: Removing a chunk of memory from the largest mempool Modifying system structures that record a frame's mempool id for each frame in the chunk

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AIX520: Balancing Memory Resources

Disclosed is a method for balancing memory resources in a dynamic logical partitioning (DLPAR) computer system. In large memory/CPU systems for AIX*, memory is divided into several discrete domains called mempools, of approximately equal size. Each mempool has its own page replacement thread that will run on its domain of memory as necessary. On a DLPAR system, when the amount of resources (CPU and memory) change, it may be the case that one mempool has significantly more memory than another, or that there are too many or too few mempools for the amount of memory or number of CPUs in the system. So changes were made to allow memory to be moved from one mempool to another, and to allow the creation and deletion of mempools at run time.

Because a significant amount of processing may be needed to move memory between mempools, it is also desirable that this be done as infrequently as possible while still maintaining balance. So rather than allocate the memory for each mempool in a contiguous block, the memory known to AIX is striped across mempools in chunks such that the removal of one Logical Memory Block (LMB) will remove memory from all mempools in the system, thus maintaining balance. When memory is added, it is added in chunks to the smallest mempool (determined at the time each chunk is added), thus preserving balance.

Despite striping memory through the mempools, it will still be necessary to rebalance occasionally. Rebalanc...