Browse Prior Art Database

Transmit Automatic Output Control insensitive to process variation

IP.com Disclosure Number: IPCOM000016494D
Original Publication Date: 2003-Jun-25
Included in the Prior Art Database: 2003-Jun-25
Document File: 6 page(s) / 79K

Publishing Venue

Motorola

Related People

John Wetters: AUTHOR

Abstract

A novel approach for a transmit attenuator at 2.4GHz implemented in CMOS technology is detailed. The output voltage is proportional to device area. The output current is steered from the load so IP3 does not degrade with attenuator level. Device area is tailored so that the desired attenuator setting is maintained within .5db over device variation for an attenuator level of 0 to -24dB in 3dB steps. No on chip matching is required. No need for a separate resistive attenuator stage is required.

This text was extracted from a PDF file.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 54% of the total text.

Page 1 of 6

Transmit Automatic Output Control insensitive to process variation

1.0 Abstract

John Wetters

2/16/03

A novel approach for a transmit attenuator at 2.4GHz implemented in CMOS technology is detailed. The output voltage is proportional to device area. The output current is steered from the load so IP3 does not degrade with attenuator level. Device area is tailored so that the desired attenuator setting is maintained within .5db over device variation for an attenuator level of 0 to -24dB in 3dB steps. No on chip matching is required. No need for a separate resistive attenuator stage is required.

2.0 Transmit Attenuator Operation

Figure 1 illustrates the top level circuit for the 2.4GHz TX (transmit) attenuator with 0 to -24dB attenuation in 3dB steps. The attenuation level is selectable by applying the supply voltage (1.5 volts) to the appropriate differential amplifier cell. Each differential amplifier cell is scaled by the number of transistor fingers so that a logarithmic attenuation function is generated as each step is activated by a DC control voltage. There are 2 bias cells and 18 scaled differential amplifier cells. Nine differential amplifier cells are required for the positive side of the differential amplifier and 9 are required for the negative side.

Copyright 2003 Motorola, Inc.

Page 2 of 6

FIGURE 1. top level circuit

Scaled attenuator cells

step1 step2 step3 step4 step5 step6 step7 step8 step9

step1 step2 step3 step4 step5 step6 step7 step8 step9

attenuator steps for + input

attenuator steps for - input

Bias cell for negative input

Scaled attenuator cells

Bias cell for positive input

Copyright 2003 Motorola, Inc.

[This page contains 4 pictures or other non-text objects]

Page 3 of 6

FIGURE 2. Schematic of differential amplifier Cell

Parameterized Nmos device

Figure 2 shows the schematic of the differential amplifier cell. It contains of one half of the differen- tial amplifier and an inverter to control the flow of current either through the load (if GB is high) or to supply (if GB is low). The purpose for this operation is to keep the current density in the differential amplifier constant as the TX attenua...