Browse Prior Art Database

Method And Apparatus For Reducing Current Mirroring Loss In High-Gate-Leakage MOS Circuits

IP.com Disclosure Number: IPCOM000016764D
Publication Date: 2003-Jul-14
Document File: 3 page(s) / 112K

Publishing Venue

The IP.com Prior Art Database

Abstract

In a MOS-based current mirror circuit configuration, current mirroring loss is mitigated by disconnecting the gate and drain of a diode connected MOS transistor and reference node (the drain of the original diode-connected MOS transistor) and its source node at the gate connection of the original diode connected MOS transistor. The drain of the additional transistor is tied to a low-impedance voltage source. In addition, a diode-connected MOS device of an opposite type may be connected to the drain node to reduce the voltage level present at the drain node, in order to mitigate undesirable high-voltage supply effects which have the potential to casue hot-electron effects and larger than desired current.

This text was extracted from a PDF file.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 100% of the total text.

Page 1 of 3

[This page contains 1 picture or other non-text object]

Page 2 of 3

[This page contains 1 picture or other non-text object]

Page 3 of 3

[This page contains 1 picture or other non-text object]