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Method for unaligned bandwidth to improve timing and sustain throughput

IP.com Disclosure Number: IPCOM000016818D
Publication Date: 2003-Jul-16
Document File: 3 page(s) / 46K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a method for unaligned bandwidth to improve timing and sustain throughput. Benefits include improved performance and improved ease of implementation.

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Method for unaligned bandwidth to improve timing and sustain throughput

Disclosed is a method for unaligned bandwidth to improve timing and sustain throughput. Benefits include improved performance and improved ease of implementation.

Background

        � � � � � Between the instruction length decoder (ILD) and the instruction rotator (IR), a small queue holds data to be rotated to the instruction decoder (ID). Each entry in the queue contains 16 macroinstruction bytes and a few sets of 16-bit control bits associated with the 16-bytes of macroinstructions. Two sets of 16 control bits (end byte marker and the first opcode byte marker) are referred to as markers. When insufficient data is in the queue to pass to the ID, the markers are passed directly from the ILD to the IR bypassing the queue to minimize front-end latency. The conventional protocol passes 16 marker bits across the IR to the ID on every cycle, regardless if the data comes from the queue or bypasses the queue (see Figure 1). This illustration depicts the datapath for one of the markers (both behave the same). All 16-bits have a direct path from the ILD to the IR.

        � � � � � The direct route from the ILD to the IR is possible only when the queue contains less than two valid entries, which are referred to as buffers. The IR requires two buffers as input to function optimally. When the queue contains only one valid buffer or is empty, data generated from the ILD does not go to the IR and bypasses the queue to reduce the front-end latency.

General description

        � � � � � The disclosed method is unaligned bandwidth to improve timing and sustain throughput on the interface between the ILD and the IR. This scheme limits the bandwidth from the ILD to the IR (bypassing the queue), while maintaining the sustained throughput of 16-bits/cycle. Only some of the bits (expressed as m < 16) of each marker can go directly from the ILD to the IR while the remaining bits (expressed as n = 16-m) are sampled in the queue on their path to the rotator. They reach the IR a cycle later than the bits that go directly.

Advantages

        � � � � � The disclosed method provides advantages, including:

•        � � � � Improved performance due to improved timing and sustained throughput on the interface between the ILD and the IR

•        � � � � Improved ease of implementation due to maintaining the conventional IR protocol

Detailed description

        � � � � � The disclosed method changes the protocol so that bits [(m-1):0] of the markers are able to reach the IR either directly from the ILD or via the buffer queue. The n-bits [15:m] are always sampled in the buffers before going to the IR. For simplicity, assume m=12 and n=4. Bits [11:0] of th...