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Method for toughened dielectrics for the assembly of semiconductor substrates

IP.com Disclosure Number: IPCOM000017111D
Publication Date: 2003-Jul-22
Document File: 2 page(s) / 50K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a method for toughened dielectrics for the assembly of semiconductor substrates. Benefits include improved reliability.

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Method for toughened dielectrics for the assembly of semiconductor substrates

Disclosed is a method for toughened dielectrics for the assembly of semiconductor substrates. Benefits include improved reliability.

Background

� � � � � A wide variety of epoxy dielectric materials have been tested on low coefficient for thermal expansion (CTE) metal core substrates (alloy 50, 42 and 36) via multilayer dumb-coupon test. All samples have failed thermal cycling by cracking. Improving the fracture toughness should produce epoxies capable of functioning on these low-CTE cores.

� � � � � Durability during impact testing is a key property for mobile and hand-held devices. Methods that improve the toughness of epoxy must also improve the robustness of the substrate. One way to toughen dielectric epoxies is to impregnate them into an expanded polytetrafluoroethylene (PTFE) core. Conventionally, this material has not been compatible with the semi-additive process (SAP) for producing substrates.

Description

        � � � � � The disclosed method is toughened dielectrics for the assembly of semiconductor substrates.

Epoxy-toughening techniques that are common to epoxy structure adhesives and epoxy molding compounds are used with epoxy dielectrics as a build-up layer in semiconductor packages.

        � � � � � The key elements of the method include:

•        � � � � Application of several ways to improve the fracture toughness to dielectric epoxies (individually or in combinations)

•        � � � � Dielectric build-up layers for s...