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Method for a BIOS free memory controller in a PC chipset

IP.com Disclosure Number: IPCOM000018767D
Publication Date: 2003-Aug-06
Document File: 4 page(s) / 77K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a method for a basic input/output system (BIOS) free memory controller in a personal computer (PC) chipset. Benefits include improved performance and an improved development environment.

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Method for a BIOS free memory controller in a PC chipset

Disclosed is a method for a basic input/output system (BIOS) free memory controller in a personal computer (PC) chipset. Benefits include improved performance and an improved development environment.

Background

        � � � � � In the conventional PC system design, the memory controller must be configured during BIOS boot up. The chipset vendor must provide a memory reference code to integrate the memory controller into the system BIOS.

        � � � � � Conventionally, at system power up before memory is ready for BIOS power-on self-test (POST) execution, the system BIOS can perform system health checks and configuration without using a lot of memory. The CPU has cache memory that can be used for system BIOS execution during the early POST or the boot block execution stages for hardware initialization and configuration. At the same time, the microcontroller inside the NB chipset starts its own code execution for memory configuration and chipset register programming. The system BIOS checks memory readiness through either a memory configuration status register or the handshaking signal. BIOS repeatedly polls the status until the memory is ready. At the moment that system BIOS requires a lot of memory to continue the rest of its work, it immediately changes code execution from cache RAM back to system memory and enables the CPU cache functionality to continue finishing BIOS POST (see Figure 1).

General description

        � � � � � The disclosed method is an embedded controller inside of the north bridge (NB) in the computer chipset. The microcontroller execution can utilize its own dedicated memory or use the� memory at a dedicated loc...