Browse Prior Art Database

Self aligned undercut structure using tungsten hard mask

IP.com Disclosure Number: IPCOM000018953D
Original Publication Date: 2003-Aug-22
Included in the Prior Art Database: 2003-Aug-22
Document File: 9 page(s) / 43K

Publishing Venue

IBM

Abstract

With increasing areal density, read track widths have been decreasing. In the widely used contiguous junction design, the hard bias field necessary to stabilize the sensor is strong enough to pin the "free" layer at the hard bias/sensor interface (track edges). As read track widths decrease, a larger fraction of the "free" layer is getting pinned. In other words, less and less of the sensor is free to read, reducing amplitude. Actual sensor designs on wafer level have the disadvantage, that the sensor width typically is realized using a resist dual apply mode. This is done to get a so-called undercut structure, enabling an easier lift off of the remaining resist structure. The undercut structure and the applied follow on processes, like ion milling and/or sputter deposition, does have the disadvantages, that we create re-deposition along the resist wall. The re-deposition, also called fencing, can later on create short cuts to upper layers. Our approach would have the benefit, to eliminate fencing. Another beneficial feature of the process discussed below, certainly is, that we would be able to get around a second photo step as well as the related alignment. The under layer structure can be controlled to a certain extend in size, using the upper imaging layer and well defined etch processes.

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Self aligned undercut structure using tungsten hard mask

With increasing areal density, read track widths have been decreasing. In the widely used contiguous junction design, the hard bias field necessary to stabilize the sensor is strong enough to pin the "free" layer at the hard bias/sensor interface (track edges). As read track widths decrease, a larger fraction of the "free" layer is getting pinned. In other words, less and less of the sensor is free to read, reducing amplitude.

    Actual sensor designs on wafer level have the disadvantage, that the sensor width typically is realized using a resist dual apply mode. This is done to get a so-called undercut structure, enabling an easier lift off of the remaining resist structure.

    The undercut structure and the applied follow on processes, like ion milling and/or sputter deposition, do have the disadvantages, that we re-deposition along the resist wall is created. The re-deposition, also called fencing, can later on create short cuts to upper layers. Our approach would have the benefit, to eliminate fencing.

    Another beneficial feature of the process discussed below, certainly is, that we would be able to get around a second photo step as well as the related alignment. The under layer structure can be controlled to a certain extend in size, using the upper imaging layer and well defined etch processes.

Introduction:

    To alleviate this problem, a lead-overlaid approach has been proposed [1]. In this design, the conducting leads are draped on top of the sensor and the lead-to-lead spacing (K5) helps define the magnetically active region of the sensor. In the overlaid region, the current is primarily through the leads. This current results in a magnetic field that tends to align the free layer magnetization normal to the page (ABS) in the overlaid region. This means that flux coming from the disk in the overlaid region will be traveling down the easy axis of the free layer in this region; a low permeability direction. Thus, the magnetic track width (active sensing region) should be confined to a region just wider than the lead-to-lead spacing (K5). This also means that the flux from the hard bias is carried along a direction of relatively high permeability in this region. So, the hard bias can be moved away, to some extent, from the active sensing region while still providing the field necessary to stabilize the sensor. So, the region of the free layer which is pinned by the hard bias at the track edges is no longer a part of the active region of the sensor and an increase in amplitude is expected.

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K5

Lead Lead

O v e rla y

S2paG gIn s u la tin

Free Layer

[1] US Patent 5,442,507 Aug. 1995, Koga et. al.

Process flow:

    Starting with a sensor layer a...