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Method for a metal-encapsulated capacitor structure

IP.com Disclosure Number: IPCOM000019054D
Publication Date: 2003-Aug-27
Document File: 5 page(s) / 166K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a method for a metal-encapsulated capacitor structure. Benefits include improved performance.

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Method for a metal-encapsulated capacitor structure

Disclosed is a method for a metal-encapsulated capacitor structure. Benefits include improved performance.

Background

         The frequency of operation of a processor is set by the lower limit of the voltage in the voltage tolerance range (window). When the voltage tolerance window is smaller around the nominal operating voltage, the VCC is higher and the frequency of operation is higher. The performance is improved by adding sufficient capacitance between the VCC and VSS power planes in the package.

         The capacitor has terminals at the edge of the capacitor (see Figure 1). The bottom-most plate is far from the metal on the top layer of the package, leading to an increased effective series inductance (ESL). This distance, d, includes the height of the backing material and the height of the solder mask above the package. The ESL of a capacitor is a function of this distance. When the distance is lower, the ESL is lower, which means that the capacitor can respond faster to a di/dt current transient.

         For a two-terminal capacitor with the same width and height, the capacitor may become rotated (having the internal plates either horizontal or vertical) during package assembly, resulting in a large variation in ESL.

         The large ESL (a large value for d) and the large variation in ESL (due to rotation) make the conventional design very unattractive for high-speed designs, where CPU demands current at a much faster rate. The voltage tolerance window for the die is also small.

         Conventional capacitors have terminals at the two ends of the cap. The cross-section view indicates that the bottom most plate of the capacitor is far away from the metal on the top layer of the package. This distance includes the height of the backing material and the height of the solder mask above the package.

         The distance of the bottom most capacitor plate to the metal of opposite polarity on the package is a strong function of the ESL of a capacitor. Making the distance, d, smaller lowers the ESL of the cap, which means that the capacitor can respond faster to a current transient on the die.

         For capacitors with equal widths and heights, the caps can become rotated during assembly, causing a large variation in ESL because the plates are either perpendicular or parallel to the package. In addition to the increased ESL associated with the large distance, the rotation problem of this capacitor during assembly makes them less attractive for use in high-speed designs.

         As process technologies scale, the requirement for a reduced inductance capacitor becomes imperative because the current transients demanded by the die are steadily increasing.

General description

         The disclosed method is a metal-encapsulated capacitor structure. Uniquely shaped capacitor pad terminals are optimized for enhanced power delivery performance.

         The decoupling capacitor inductance is dominated by pad layout. Providing a low inductance power delivery path be...