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Method for memory probing on a multiple-DIMM bus

IP.com Disclosure Number: IPCOM000019063D
Publication Date: 2003-Aug-27
Document File: 2 page(s) / 216K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a method for memory probing on a multiple dual inline memory module (DIMM) bus. Benefits include improved functionality and an improved test environment.

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Method for memory probing on a multiple-DIMM bus

Disclosed is a method for memory probing on a multiple dual inline memory module (DIMM) bus. Benefits include improved functionality and an improved test environment.

Background

         The conventional solution is to manually add probe points to all the chip select (CS) signals. In a complex memory subsystem, this approach results in many messy probe points, which can adversely affect signal quality.

         Conventionally, all the data/address bus and other controller signals are shared between multiple DIMMs on the same memory bus. The only group of signals that has different values to different DIMMs is the chip select (CS) group. The CS signals are driven by the memory repeater (MR) to select/deselect the DIMM that is the target for a given transaction. Only two of the CS signals (one pair) are routed to a DIMM, and only one of the pairs can be asserted at a time. As a result, only one DIMM on the bus can be selected at a time.

General description

         The disclosed method enables the full probing of multiple DIMMs on the same memory bus with just one probe.

Advantages

         The disclosed method provides advantages, including:

•         Improved functionality due to providing a method to capture of all the transactions to all the DIMMS with just one probe sitting on any DIMM socket

•         Improved functionality due to providing a method to strengthen the CS signals to the memory probe

•         Improved test environment due to providing improved DIMM testing with...