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Web-enabled Embedded Logic Analyzer (WELA)

IP.com Disclosure Number: IPCOM000019162D
Publication Date: 2003-Sep-02
Document File: 5 page(s) / 399K

Publishing Venue

The IP.com Prior Art Database

Abstract

A web-enabled embedded logic analyzer is described for placement on a chip this permits logic analysis to be performed without the need for costly logic analyzers.

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Publication Version

Title:

Web-enabled Embedded Logic Analyzer (WELA)

Problem:

"Table top" logic analyzers are expensive instruments with lots of connection wires. Solution is a low cost and easy to connect logic analyzer functionality for FPGA designers.

Solution:

My invention solves the described problem by presenting a logic analyzer that has an integrated web server. This functionality (web server and logic analyzer) is placed to an FPGA circuit together with the actual design that is being developed for the FPGA. Web server in the logic analyzer (WELA) functionality thus uses the same design building blocks (flip-flop's, LUTs and RAM) from the FPGA than the actual design. The WELA part can be described in HDL language just like the design itself so all the normal design tools and flows can be used also when WELA is included.

In FPGA verification and debugging it is vital to be able to monitor designs internal signals. Logic analyzer can be used for this. Logic analyzers are expensive instruments. My WELA invention offers designers a possibility to integrate logic analyzer to the same FPGA circuit that actual designer is placed to. This embedded logic analyzer is implemented using HDL code (Verilog or VHDL) which makes it possible to integrate the logic analyzer to almost any design. Furthermore integrating a web-server with the logic analyzer creates a very easy and general way of connecting a computer the FPGA (for example PCs, MAC's and UNIX machines can all be directly connected to the same device without any modifications).

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Executive Summary

Idea: Logic analyzer with integrated web server

Synthesized and routed to an FPGA together with the design under development for easy and low cost design debug Computer connects directly to the FPGA (or through Ethernet PHY chip) with normal Ethernet network cable Logic analyzer GUI is shown on any web browser on the connected computer (no new SW needed)

FPGA

Design

W...