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MRAM with Unidirectional Write Current

IP.com Disclosure Number: IPCOM000019665D
Publication Date: 2003-Sep-24
Document File: 4 page(s) / 50K

Publishing Venue

The IP.com Prior Art Database

Related People

Daniel Braun: AUTHOR

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MRAM with Unidirectional Write Current

The current invention is based on micromagnetic simulations which show that an MRAM cell can be switched in both directions by a hard axis magnetic field pulse in the same direction.

It is well known that a hard axis field can be used for destabilizing a magnetic cell. More precisely, the hard axis field rotates the magnetization away from the easy axis direction. While for state of the art magnetic select schemes this process is thought of as quasistatic, it is in reality a dynamical process that takes place on a timescale of about 1ns, depending on the strength of the field applied.

Situations can be easily achieved where the magnetization vector does not remain in the first quadrant of the astroid, but shoots over into the other half of the astroid, corresponding to a switched state. With the hard axis field still turned on, it can come to a rest there, and when the hard axis field is finally turned off, it relaxes to the switched state.

This process works perfectly well in both directions, i.e. the same field in the same direction will lead to an overshooting and finally to a switched state, regardless of the initial state.

Moreover, it turns out that the amplitude of the field required is typically substantially smaller than the quasistatic width of the astroid in the hard axis direction.

In an example simulated, a 300x150x3.5nm3 Permalloy cell reliably switched with a hard axis puls of 130Oe applied for a duration of 4ns. A realistic damping parameter alpha=0.01 was used.

The 130 Oe should be compared with a tip of the (quasistatic) astroid in hard axis field direction at about 300Oe.

Fig. 1 shows the array that makes use of unidirectional writing. Each node consists of a transistor and a tunnel junction in series. The resistance of the tunnel junction is chosen of the order of 100 Ohms, such that for a 1V drop accross it, about 10mA of current can be drawn, which is used for creating the hard axis switsching field (see Fig.2). For writing, the selected wordline (WL) and bitline (BL) are put on Vdd, all other BLs and WLs on ground. Thus only the selected transistor will have a current flow through the selected cell. The backflow of the current is through the substrate, which effectively forms a large ground plate. This architecture makes optimal use of the unidirectional write, since no recharging of the ground plate due to change of polarity is needed.

Fig.1 DRAM type architecture with TJs controlled by transistors. The conductor that carries the current used for switching is parallel to the ground contact of the TJ.

 
 

Fig.2 shows schematically a possible integration scheme in a cross section parallel to the BLs. The long axis o...