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Publication on Parasitic capacitance balancing in parallel CFLL backlight driving.

IP.com Disclosure Number: IPCOM000019828D
Publication Date: 2003-Oct-01
Document File: 1 page(s) / 42K

Publishing Venue

The IP.com Prior Art Database

Abstract

ID611514

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Publication on Parasitic capacitance balancing in parallel CFLL backlight driving.

Cold Cathode Fluorecent Lamps for LCD backlighting are driven by a high frequency (50-100kHz) AC high voltage (~1kV). Any paracitic capacitance in this high voltage / high frequency circuit will cause leakage currents. In order to sustain a good current balance between the multiple parallel branches, the following special measures are taken.

 

  1. The ‘hot’ track of each branch placed on one side of the PCB, has a ground track on the opposite side of the PCB. The width and length of these two opposite tracks, correspond to exactly the same surface area for any other combination of opposite tracks in any other parallel branch of the high voltage / high frequency circuit. In this way the local parasitic capacitance is made equal and dominant.
  2. Tracks running parallel to each other over a relative long distance are switched place over equal distances, in order to distribute the parasitic capacitance to external references. The multiple series capacitors are ideal to enable the track crossings on the PCB. (see figure 1)