Browse Prior Art Database

Stackable structure for High Speed Electronic assembly Test measurements

IP.com Disclosure Number: IPCOM000019829D
Original Publication Date: 2003-Oct-01
Included in the Prior Art Database: 2003-Oct-01
Document File: 1 page(s) / 33K

Publishing Venue

IBM

Abstract

Disclosed is a method to design and assembling substrates for technology characterization in labs and product development environments. In the specific embodiment for High Speed measurements.

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Stackable structure for High Speed Electronic assembly Test measurements

  Test set-ups for complex electronic components substrates are difficult and expensive, they usually require to design specific hardware to host the piece under test, this hardware is custom made and mostly used for each specific part number. The disclose method shows a stackable structure that allow complex electrical evaluation of three-dimensional strucutures. This technique uses a single design that acts as module under test and in the same time acts as test-hardware test to support the hardware substrate under test.

  High speed electrical probing od three-dimensional structures is difficult and it is also very difficult to be constantly replicated for sequential measurements, the stackable structure allows the probing of the electrical feature from the same side. Double side simultaneous probing would otherwise require very expensive fixturing.

Chip to Board Complete Transition

Test probes

Launch Pads + Vertical Structures

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Test probes

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TV Laminate as Board Top View
0 ° Rotation

TV Laminate

as Module

Top View

0 or 180 °

Rotation

TV Laminate

as Board

Top View 180 ° Rotation

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Launch Pads + Vertical Structures

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Disclosed by International Business Machines Corporation

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