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A Method to Determine CPU Hyperthreading Abilities in a Chassis and Enable Intelligent Software Decisions

IP.com Disclosure Number: IPCOM000019840D
Publication Date: 2003-Oct-01
Document File: 4 page(s) / 101K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a method that enables a centralized point for determining what SBC boards in the chassis support hyperthreading. Benefits include the ability to dynamically determine the heat dissipation/power envelope of the chassis, and intelligently turn on or off hyperthreading.

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A Method to Determine CPU Hyperthreading Abilities in a Chassis and Enable Intelligent Software Decisions

Disclosed is a method that enables a centralized point for determining what SBC boards in the chassis support hyperthreading. Benefits include the ability to dynamically determine the heat dissipation/power envelope of the chassis, and intelligently turn on or off hyperthreading.

Background

Intel® Pentium 4 processors support hyperthreading, which allows for faster computation- intensive tasks by making a single physical processor appear like two logical processors. This feature, in many cases, increases the performance of the operating system and the application software written on IA-32 processors. However, not all software works well with hyperthreading. For instance, I/O intensive software does not need the degree of parallelism offered by hyperthreading, making the processor work harder and increasing power consumption, which in turn increases the need for effective heat dissipation.

Currently, Hyperthreading is enabled by default on the IA-32 processors. There is no flexibility offered for the application software executing on SBC boards with IA-32 processors to intelligently decide when to use or not use this powerful feature.

General Description

The disclosed method consists of the following components:

 

  • A Processor Inventory Manager (PIM) that resides on the CMM
  • A Processor Capability Detector (PCD) that resides in the BIOS of the SBCs.

Also, the disclosed method depends on an IPMI conformant Baseboard Management Controller (BMC) being present on the SBC board, and that is capable of interacting with the BIOS and interacting with the CMM using IPMI messages (see Figure 1).

The disclosed method makes intelligent use of Intel’s hyperthreading technology. The PCD module in the BIOS of the SBC boards detects the number of processors that the SBC board contains, and if the processors support hyperthreading. The PCD sends a message to the BMC that in turn relays information to the CMM over the IPMB bus by encapsulating the data in IPMI messages. This is done as a part of the start up routine of the BIOS when the SBC board is powered up in the chassis. The PCD also allows the BIOS to toggle the hyperthreading of the processors on and off.

The PIM module in the CMM maintains a table of the hyperthreading capabilities corresponding to...