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Intelligent Netlister – Providing a unique value proposition to chip designers

IP.com Disclosure Number: IPCOM000019947D
Original Publication Date: 2003-Oct-13
Included in the Prior Art Database: 2003-Oct-13
Document File: 7 page(s) / 31K

Publishing Venue

Motorola

Related People

Sanjeev Mathur: AUTHOR [+2]

Abstract

In this complex world of chip design, connecting thousands of signals on a chip poses a unique challenge to designers. As time-to-market becomes more critical, companies are turning towards complex electronic design automation (EDA) tools, which can automate the design, verification, and layout of a chip. A critical starting point for these tools is a chip-level hardware description language (HDL) netlist, which defines the connectivity across various blocks on the chip. Automating the generation of this HDL file is essential in order for chip designers to improve their productivity and reduce the chip design cycle time. In response to this challenge, designers have developed a process for automating netlist generation using a GUI-based tool. Intelligent Netlister, as the tool is called, helps a user easily define chip-level HDL connectivity, irrespective of the levels of hierarchies involved in designing a chip.

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Intelligent Netlister - Providing a unique value proposition to chip designers

Sanjeev Mathur John Walters

ABSTRACT

In this complex world of chip design, connecting thousands of signals on a chip poses a unique chal- lenge to designers. As time-to-market becomes more critical, companies are turning towards complex electronic design automation (EDA) tools, which can automate the design, verification, and layout of a chip. A critical starting point for these tools is a chip-level hardware description language (HDL) netlist, which defines the connectivity across various blocks on the chip. Automating the generation of this HDL file is essential in order for chip designers to improve their productivity and reduce the chip design cycle time. In response to this challenge, designers have developed a process for automating netlist generation using a GUI-based tool. Intelligent Netlister, as the tool is called, helps a user easily define chip-level HDL connectivity, irrespective of the levels of hierarchies involved in designing a chip.

INTRODUCTION

The tedious manual process of generating a top-level Verilog HDL netlist file as shown in Figure 1 can be simplified and made more efficient through the use of Intelligent Netlister. The new Verilog HDL netlist generation flow developed using Intelligent Netlister is shown in Figures 2 & 3. Intelligent Netlister tool packs in a lot of powerful features that can help chip designers quickly and easily build Verilog netlist files. It can also provide more user-visibility of the netlist files and helps prevent user-introduced errors.

FEATURES

Intelligent Netlister has the following features: Generation of chip-level netlist or block-level netlist: Apart from providing users the ability to generate top-level Verilog HDL netlist, Intelligent Netlister also has the capability to generate block level Verilog netlists.

Copyright Motorola, Inc, 2003.

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Block Instantiation: Intelligent Netlister allows users to instantiate any block defined as an architecture entity on a chip. The tool lists all ports of blocks in the GUI to facilitate user-defined connectivity across the chip.

Generating netlist using ASCII connectivity file: The tool provides an option for the user to automate the generation of top-level or block-level netlist files from an input ASCII file that describes connectivity
Edit existing netlist: Intelligent netlister GUI window enables a user to easily modify an existing netlist. Automated/Custom wire name generation: This feature provides a user the capability to either automatically let the tool generate wire names or input user-defined custom wire name definitions
Connectivity Report generation:
Connectivity reports are ASCII formatted files that use a tabular format to describe block interface connectivity specified by the user.

Specifying connections using GUI buttons: Various buttons provided in the main GUI window of the tool enable a user do the following: - Make basic connec...