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Method for a QFN package for a DrMOS for a microprocessor voltage regulator

IP.com Disclosure Number: IPCOM000019985D
Publication Date: 2003-Oct-15
Document File: 7 page(s) / 125K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a method for a quad flat no-lead (QFN) package for an integrated metal oxide semiconductor field-effect transistor (MOSFET) and driver (DrMOS) for a microprocessor voltage regulator. Benefits include improved functionality and improved performance.

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Method for a QFN package for a DrMOS for a microprocessor voltage regulator

Disclosed is a method for a quad flat no-lead (QFN) package for an integrated metal oxide semiconductor field-effect transistor (MOSFET) and driver (DrMOS) for a microprocessor voltage regulator. Benefits include improved functionality and improved performance.

Background

         The power requirements of microprocessors are increasing with every process generation. This trend is reflected in the increased static (steady state) and dynamic (transient) power that the processor voltage regulator (VR) must generate at very low voltages (~1V) and very high currents (100+ amp). This trend is foreseen to continue in the near future. The consequence of the increased power manifests itself in the form of two technology requirements:

•         Increased power density in the VR to satisfy higher power transfer in a limited real estate environment (such as a desktop)

•         Increased efficiency at higher switching frequencies (a result of a requirement for faster dynamic response) to maintain losses at low levels

         These two requirements have driven technology advances in the building blocks of the VR, such as MOSFETs. These advanced semiconductor switches have been used in synchronous buck converters, which has remained the main workhorse for the voltage regulators supplying microprocessors. Due to the lopsided nature of the voltage conversion ratio required in the VRs, the two switches have been optimized for different characteristics to reduce losses. The concept has been moved a step further by integrating the switches and their drivers into a DrMOS combination that have shown increased performance (see Figure 1).

         Although most FET manufacturers have adopted the DrMOS concept, no intercompatibility exists with most of the features. In addition, smart features that have been incorporated into these devices have the unintended consequence of limiting the choice of controllers and drivers for a given solution. Given the requirement for multiple supply sources for components, a requirement exists for commonality on basic device features and footprint compatibility to the PCB motherboard.

         A conventional DrMOS device is illustrated with a surface mountable QFN package, which is called a micro lead frame package (see Figure 2). A cross-sectional view of a typical QFN package is also illustrated (see Figure 3).

         Most of suppliers agree to the conventional pin out for the input and output...