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Method for Changing Selected Bits or Bit Fields within Parity Protected Data without Recalculating Parity while Maintaining Parity Protection

IP.com Disclosure Number: IPCOM000020062D
Original Publication Date: 2003-Oct-22
Included in the Prior Art Database: 2003-Oct-22
Document File: 6 page(s) / 34K

Publishing Venue

Motorola

Related People

Don Atkins: AUTHOR [+3]

Abstract

A method for changing selected bits or bit fields within parity protected data is described that allows the data to be modified without having to calculate the parity bit while still maintaining parity protection. The method uses the fact that parity protection only detects an odd number of bit errors leaving even number of bit errors going undetected. Therefore, for any bit which needs to be changed independently of the other bits, the method provides two bits of representation in the parity protected data word. This creates an even number of bits changing state, which preserves the state of the parity bit. This method can be used anywhere parity is used providing a wide range of applications including data storage and data transmission devices. Examples of data storage devices include magnetic media, disc drives, memory systems, and cache arrays. Data transmission includes both parallel and serial transmission either wired or wireless.

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Method for Changing Selected Bits or Bit Fields within Parity Protected Data without Recalculating Parity while Maintaining Parity Protection

Don Atkins

Frank Miller

Bill Moyer

Abstract

A method for changing selected bits or bit fields within parity protected data is described that allows the data to be modified without having to calculate the parity bit while still maintaining parity protection. The method uses the fact that parity protection only detects an odd number of bit errors leaving even number of bit errors going undetected. Therefore, for any bit which needs to be changed independently of the other bits, the method provides two bits of representation in the parity protected data word. This creates an even number of bits changing state, which preserves the state of the parity bit. This method can be used anywhere parity is used providing a wide range of applications including data storage and data transmission devices. Examples of data storage devices include magnetic media, disc drives, memory systems, and cache arrays. Data transmission includes both parallel and serial transmission either wired or wireless.

Introduction

Over the years, parity has been used extensively to ensure data integrity. It has the advantage of being simple to implement requiring only one extra bit per unit, or pattern, of data. Parity is traditionally thought of as simply an error detection mechanism for single bit data errors; dou­ble bit errors go undetected. In actuality, parity will detect any odd number of bit errors and leave any even number of bit errors undetected.

When parity is used with a memory system, the data pattern is first given to a parity generator that provides the parity bit. Parity may be either even or odd. Even parity indicates that the total number of 1s in the data pattern including the calculated parity is an even number. Simi­larly, odd parity indicates that the total number of 1s (including the parity bit) is an odd num­ber. After the parity is generated, the data pattern and parity bit are saved into the memory array. Later, when data is retrieved from memory, the number of 1s in the retrieved data can be counted and compared against the parity rule being used (either even or odd). If the number of 1s in the retrieved data does not match the parity rule then an error condition can be generated to let the system take appropriate action.

In low-cost low-power applications, complications arise when only a select number of bits or bit fields within the saved data pattern are to be updated. In this case, the saved data pattern is tra­ditionally read from memory, the selected bits or bit fields modified, parity re-calculated, and the new data pattern with re-calculated parity saved back to memory (i.e. a read-modify-write scenario). These read-modify-write scenarios present a number of problems including requirements to have more complex state machines controlling memory operations, more restrictions on timing considerations, an...