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Automatic Schematic Switch

IP.com Disclosure Number: IPCOM000020148D
Published in the IP.com Journal: Volume 3 Issue 11 (2003-11-25)
Included in the Prior Art Database: 2003-Nov-25
Document File: 2 page(s) / 52K

Publishing Venue

Siemens

Related People

Juergen Carstens: CONTACT

Abstract

In memory design it is very common to develop one type of memory with several options. For instance, the several form factors are implemented using different bitline multiplexer. To be able to simulate the complete memory, a model is built: the critical path. If a circuit implementation changes (i.e. the bitline multiplexer), several critical paths have to be developed and maintained in parallel. In the past, a dual-port SRAM (Static Random Access Memory) generator has been developed. It contains three different bitline multipexer and six different pre-decoding cells, resulting in 18 critical paths. To optimize the size of the driver, they should be adjusted to the actual load. If four different sizes are used for the wordline driver and the output driver, it results in 3x4x4x4=288 critical paths, making any redesign very difficult. Below, a new method is introduced, which allows to switch from one implementation of a sub-circuit to another without any additional programming and without the use of several critical paths. Therefore, it minimizes the development effort and the risk of getting inconsistent data in case of a modification. A new kind of cells, so-called ,wrappers', are introduced, which have the particularity of featuring only one single symbol, which is instantiated in one critical path. The wrapper cell has as many schematics as implementations are available and is capable of adapting to different pin counts. The wrapper comprises all pins used in all sub-circuits. The unused pins have to be tied down (or up) by a high resistance to avoid problems during the simulation. Figure 1 shows an example of a circuit with three implementations and with different inputs and outputs. The implementation is demonstrated using the ,Cadence Composer' schematic entry software. In this case, the switch from one schematic to another is automatically conducted during the ,netlisting' process using the ,switch view list' mechanism.

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© SIEMENS AG 2003 file: ifx_2003J53637.doc page: 1

Automatic Schematic Switch

Idea: Yannick Martelloni, DE-Munich

In memory design it is very common to develop one type of memory with several options. For instance, the several form factors are implemented using different bitline multiplexer. To be able to simulate the complete memory, a model is built: the critical path. If a circuit implementation changes (i.e. the bitline multiplexer), several critical paths have to be developed and maintained in parallel. In the past, a dual-port SRAM (Static Random Access Memory) generator has been developed. It contains three different bitline multipexer and six different pre-decoding cells, resulting in 18 critical paths. To optimize the size of the driver, they should be adjusted to the actual load. If four different sizes are used for the wordline driver and the output driver, it results in 3x4x4x4=288 critical paths, making any redesign very difficult.

Below, a new method is introduced, which allows to switch from one implementation of a sub-circuit to another without any additional programming and without the use of several critical paths. Therefore, it minimizes the development effort and the risk of getting inconsistent data in case of a modification. A new kind of cells, so-called ,wrappers', are introduced, which have the particularity of featuring only one single symbol, which is instantiated in one critical path. The wrapper cell has as many schematics as implem...