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Method for a stepped IHS structure on notched/trenched silicon

IP.com Disclosure Number: IPCOM000020163D
Publication Date: 2003-Oct-29
Document File: 7 page(s) / 171K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a method for a stepped integrated heat spreader (IHS) structure on notched/trenched silicon. Benefits include improved thermal performance and improved reliability.

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Method for a stepped IHS structure on notched/trenched silicon

Disclosed is a method for a stepped integrated heat spreader (IHS) structure on notched/trenched silicon. Benefits include improved thermal performance and improved reliability.

Background

         As indicated by Moore’s law, the number of transistors on the PC conventionally doubles every two years. One of the implications of this increased transistor density is increased power loss, resulting in increased heat generation during the operation of a computer. As a result, methods for extracting heat from packages are required so that the devices can function reliably. The goal of thermal design is to provide a means of removing heat from the die and make the heat distribution more uniform.

         Heat dissipation is conventionally accomplished by limiting the thermal resistance from the case to the junction, Rjc, the geometry, and the conductivity of the IHS, thermal interface material (TIM), and Si die (see Figure 1).

         Lower thermal resistance lowers the junction temperatures, which enables the CPUs to operate at higher processing speeds and to function reliably. Thermal resistance can be calculated
as :

         This equation includes the following values:

•         R= Thermal resistance in °Ccm2/W

•         L = Length of the heat path in cm

•         K = Thermal conductivity of the medium in W/cmK

         For example, the thermal resistance for the configuration in Figure 1 can be calculated (see Figure 2).

         The solder-die and solder-lid interface is comprised of intermetallics for which no thermal conductivity (K) data is found. As a result, an assumption is made that the thermal conductivity at the interface is 1/10th of that of solder. Because the thickness of the interface is so small, its overall contribution to thermal resistance is insignificant. Any error from the assumption about the thermal K at the interface is likely to be small.

         The following values are used for the example:

•         Si thickness = 0. 750 mm

•         Die-TIM interface = Lid-TIM interface = 0.002 mm

•         Solder TIM (indium) thickness = 0.185 mm

•         Heat spreader thickness = 1.5 mm

         The bulk resistance can be calculated (see Figure 3), resulting in the following values:

•         RSi = 0.05

•         Rsolder = 0.022

•         Rsolder-lid~ Rsolder-die = 0.000235 (Because thermal conductivity values for the intermetallic interface are not available, this calculation is only an estimate.)

•         RCu= 0.0375

•         RBulk = 0.1095

         The RBulk value is very close to the actual Rjc values obtained on test vehicles, which averages 0.122 for the test vehicles designed for the 90-nm technology. The difference of 0.0125 can be ascribed to unaccounted materials and/or an inaccurate estimate of the interfacial resistance.

         The calculations indicate that the contribution of Si to total thermal resistance is ~45%.

General description

The disclosed method is a stepped IHS structure on a notched silicon substrate. Thermal performance is improved by decreasing the thermal resistance and by attaching the s...