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Method for the use of the standard I/O cells for SMB and PME I/F

IP.com Disclosure Number: IPCOM000020402D
Publication Date: 2003-Nov-19
Document File: 2 page(s) / 31K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a method for the use of the standard input/output (I/O) cells for System Management Bus (SMB) and Power Management Event (PME#) interface (I/F). Benefits include reduced design effort and extra pins (for testing usage, for example).

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Method for the use of the standard I/O cells for SMB and PME I/F

Disclosed is a method for the use of the standard input/output (I/O) cells for System Management Bus (SMB) and Power Management Event (PME#) interface (I/F). Benefits include reduced design effort and extra pins (for testing usage, for example).

Background

         Conventional methods require altering the standard I/O buffer or some other special design to lower current leakage when the power is OFF. Additionally, cutting the positive-channel metal oxide semiconductor (PMOS) pull-ups or a specially designed output driver (OD) with negative-channel metal oxide semiconductor (NMOS) clamps are required.

General description

         The disclosed method is the use of standard 3.3V I/O cells for the SMB and PME I/F (see Figure 1). The interface requires that the input leakage is small all the time as well as when the chip’s power rails is OFF.

         To achieve the reduced leakage level, a simple serial diode is inserted between the rail and the power supply/electrostatic discharge (ESD) claps to maintain the positive ESD path.

         If I/O uses a bias circuitry, the bias circuitry should also be connected to the local power bus (see Figure 1).

         The disclosed method enables a standard I/O cell and additional external standard components to create the SMB/PME open drain I/F with minimal design effort.

Advantages

         The disclosed method provides advantages, including:

•         Improved development environment due to reducing the time-to-market and design...