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Unlimited PCI ROM scan memory for Servers

IP.com Disclosure Number: IPCOM000021177D
Original Publication Date: 2003-Dec-31
Included in the Prior Art Database: 2003-Dec-31
Document File: 3 page(s) / 52K

Publishing Venue

IBM

Abstract

To facilitate the addition of new functions to a PC System a portion of the memory address space was set aside for add-in programs which were typically added by using a nonvolatile memory such as a ROM resident on an adapter card. A header was required in order to be recognized during a scan performed during Power On Self Test (POST). The header is located at the beginning of the allocation of memory used. Hence, the name for the process these add-in ROMs discovered during POST is ROM Scan and the allocation in the memory address space dedicated to add-in ROMs is referred to simply as ROM Scan area. The header is often referred to as the ROM Scan Header.

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Unlimited PCI ROM scan memory for Servers

      To facilitate the addition of new functions to a PC System a portion of the memory address space was set aside for add-in programs which were typically added by using a nonvolatile memory such as a ROM resident on an adapter card. A header was required in order to be recognized during a scan performed during Power On Self Test (POST). The header is located at the beginning of the allocation of memory used. Hence, the name for the process these add-in ROMs discovered during POST is ROM Scan and the allocation in the memory address space dedicated to add-in ROMs is referred to simply as ROM Scan area. The header is often referred to as the ROM Scan Header.

    The size of the area allocated in the memory address space for add-in ROM's is 128KBs. It is located in the C000h and D000h segments, below 1 MB. In the early days of the PC, the amount of space used by add-in ROMs was not a problem. However, over the years, adapters have expanded their usage of this dedicated memory address space. This area below 1 MB is typically used for add-in boot ROM, e.g. network adapters. It is also used on occasions for configuration routines supplied by the adapter developer. Allocations for large memory areas are available above 1MB memory address space address but the typical allocation must be made below 1MB address if the add-in ROMs contain either boot code or configuration code. The only alternative for a constrained ROM Scan area is to remove adapters which limit capabilities of the using system and its value in the market.

    Over the years, is has become apparent that the ROM scan area is not of sufficient size for servers because of all their add-in option ROMs. Typically, Servers provide 4 to 6 expansion slots, which are fully populated with adapter cards for multiple reasons, e.g. Management Processors, Network Cards, or I/O cards such as a raid adapter. Adapter cards can contain from between 64K to 256K of BIOS or embedded code. It is easy to see with a fully populated bus, that the address space allocated for add-in ROMs is not sufficient. Using the existing ROM Scan process, current PCs will require over one(1) MB of the memory address space dedicated to the ROM scan area. What is needed is a system that can support a fully loaded PC system including memory address space for all add-in ROMs below the 1MB memory address space address.

    This invention is a novel use of the memory address space above 1MB and the SMI handler to expand upon the ROM scan area, which requires changes to POST, SMI Handler and Setup in a PC system.

    Setup Enhancements In order to support ROM Scan Memory OverCommit Enhancement in a PC system, Setup needs to be enhanced to recognize an over commitment of the ROM Scan memory address space, a new Over Commit ROM Scan header during ROM Scan process will also be made available to quickly identify those add-in ROMs supporting the present invention, and make allocations for add-in ROMs...