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Method for a receiver providing SSTL and LVCMOS support with flexible control

IP.com Disclosure Number: IPCOM000021245D
Publication Date: 2004-Jan-07
Document File: 2 page(s) / 60K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a method for a receiver providing stub-series-terminated logic (SSTL) and low voltage complementary metal oxide semiconductor (LVCMOS) support with flexible control. Benefits include improved functionality, improved performance, and improved design flexibility.

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Method for a receiver providing SSTL and LVCMOS support with flexible control

Disclosed is a method for a receiver providing stub-series-terminated logic (SSTL) and low voltage complementary metal oxide semiconductor (LVCMOS) support with flexible control. Benefits include improved functionality, improved performance, and improved design flexibility.

Description

         The disclosed method is a single buffer that supports double data rate (DDR) memory and single data rate (SDR) memory (see Figure 1). The method supports two topologies, LVCMOS for SDR and SSTL for DDR. All internal nodes must be in the proper state to ensure that the appropriate protocol and mode of operation is maintained.

         The use of a single buffer rather than two buffers makes some additional silicon surface area available on a die.

Advantages

         The disclosed method provides advantages, including:

•         Improved functionality due to supporting SDR (LVCMOS) and DDR (SSTL) memory using a single buffer

•         Improved performance due to supporting two modes without interference

•         Improved performance due to saving die surface area

•         Improved design flexibility due to supporting two memory modes

Fig. 1

Disclosed anonymously