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Method for silkscreen patterns on PCBs to create reliable CSP solder joints

IP.com Disclosure Number: IPCOM000021635D
Publication Date: 2004-Jan-28
Document File: 5 page(s) / 267K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a method for silkscreen patterns on printed circuit boards (PCBs) to create reliable chip-scale package (CSP) solder joints. Benefits include improved functionality and improved performance.

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Method for silkscreen patterns on PCBs to create reliable CSP solder joints

Disclosed is a method for silkscreen patterns on printed circuit boards (PCBs) to create reliable chip-scale package (CSP) solder joints. Benefits include improved functionality and improved performance.

Background

         As the ball grid array (BGA) solder ball pitch becomes smaller, solder joint reliability of the second-level interconnection becomes increasingly less reliable. The stand-off height between the package and the PCB is smaller than on larger-pitch components. This smaller standoff enables less flexibility of the solder joint during temperature and shock cycling, resulting in solder-joint cracking sooner in its life cycle. This problem is greater with .8-mm pitch and smaller CSPs and BGA components.

         Conventional CSP designs use epoxy underfill to provide reliable solder joints (see Figure 1). This process requires additional equipment in the board assembly shop and adds significant cost to the CSP attachment process. It does not allow rework.

General description

The disclosed method is silkscreen patterns next to BGA or CSP grid array solder pads to improve the solder joint reliability of the second-level interface between the package and the PCB.

Advantages

         The disclosed method provides advantages, including:

•         Improved functionality due to reinforcing solder joints without the use of under-fill epoxy

•         Improved reliability due to preventing solder joint cracking and failure

•         Improved cost effectiveness due to eliminating the requirement for under-fill equipment

Detailed description

         The disclosed method uses silkscreen patterns on PCBs to improve CSP solder-joint reliability. The silkscreen boarder around the CSP solder pads enables the stencil to be lifted up off the PCB by 1 to 2 mils. The multi-sided squares between the solder pads keep the stencil 1-2 mil off the solder pads along the full grid pattern. The solder paste deposited by this pattern increases the solder volume by 20 to 40%. The stencil is 5 mils thick and the standoff between the stencil and the board is 1-2 mils. This extra solder past enables a taller standoff after the package is reflowed (see Figures 2...