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Browse Prior Art Database

Parser multiplexor

IP.com Disclosure Number: IPCOM000021811D
Original Publication Date: 2004-Feb-10
Included in the Prior Art Database: 2004-Feb-10
Document File: 1 page(s) / 56K

Publishing Venue

IBM

Abstract

To extract fields from packet header of a network protocol on a large width bus as quickly as possible.

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Parser multiplexor

Hereunder is disclosed a new way to extract fields from packet header of a network protocol on a large width bus as quickly as possible. On such protocol, the first bit of the header can start anywhere on the bus. The header and extracted field size, as well as the fields starting positions, are given as an input to the multiplexer.

    The conventional solution is to use a multiplexer with a "standard" control word. For example, with a 9 bits bus width, when the extracted bit numbers are 1,2,3 and 7,8,9, (which correspond to fields 1 and 2), the control word will be : "1,2,3,7,8,9,X,X,X"

123456789

    The problem is that in a high speed design with a large width bus, there is not enough time to calculate the control word and do the multiplexing in one cycle. This is due to the fact that to prepare the control word, a counter has to be used to increment the start field bit until the end of the field. For Field 2, to calculate the position of the two ending bits "8" and "9", two incrementations from the started one "7" are necessary.

    The disclosed technique solves this timing problem by using a "Parser multiplexor" which is based on a different way to code the control word. . Taking the same example than above, the control word would then be "1,1,1,4,4,4,0,0,0" .

    Explanation : in the first box, the box just above is copied, so that the control value is "1". For the second and third places, the box just above them is also copied so that their control val...