TRENCH POWER MOSFET HAVING LOW GATE CHARGE
Publication Date: 2004-Feb-17
The IP.com Prior Art Database
Key Words Power MOSFET, Gate Charge, RdsON, Trench, Switching Speed, Gate Rupture
Power MOSFET, Gate Charge, RdsON, Trench, Switching Speed, Gate Rupture
Trench power MOSFET designs are typically optimized around at least two performance characteristics like gate charge and on resistance. Unfortunately, the design factors in prior power MOSFET designs that have controlled these performance characteristics have been diametrically opposed, that is to improve one characteristic one must sacrifice improvement in the other. Therefore, it would be of great commercial advantage to produce a new trench power MOSFET having both improved gate charge and on resistance.
Detailed Description of the Drawings
The following drawings (Figure 1, Figure 2) describe a structure and method of forming a trench power MOSFET having a thick oxide at the bottom of the gate to reduce the gate drain capacitance (CGD), and simultaneously forming a thick oxide at a top surface which improves the gate rupture. The thick oxide is formed at the top and bottom of the trench by locally oxidizing a thin layer of polysilicon that is deposited over the gate oxide using a nitride spacer to prevent oxidizing the poly on the trench sidewalls. The low gate charge is obtained by the thickening of the oxide at the trench bottom which lowers the Miller capacitance, while the improved gate rupture is obtained by the thickening of the oxide at the top trench corner.
Example Process Flow:
1) Field oxidation and active area definition.