Browse Prior Art Database

Innovative method to extract TATER Info with Non-Functional System for CSP Testing

IP.com Disclosure Number: IPCOM000022450D
Original Publication Date: 2004-Mar-15
Included in the Prior Art Database: 2004-Mar-15
Document File: 1 page(s) / 11K

Publishing Venue

IBM

Abstract

The PC industry for the past several years has been plagued with various quality issues dealing with early life failures. These failures are induced by various factors in the industry including out of spec environments, tier two capacitors, HDD failures, etc. The TATER (Time And Temperature Event Recorder) system is a method of recording data to a piece of NVM (Non volatile memory) on the system. The issue is removing the data from the system when all power rails to the system do not come up due to the failure mechanism.

This text was extracted from a PDF file.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 95% of the total text.

Page 1 of 1

Innovative method to extract TATER Info with Non-Functional System for CSP Testing

The PC industry for the past several years has been plagued with various quality issues dealing with early life failures. These failures are induced by various factors in the industry including out of spec environments, tier two capacitors, HDD failures, etc. The TATER (Time And Temperature Event Recorder) system is a method of recording data to a piece of NVM (Non volatile memory) on the system. The issue is removing the data from the system when all power rails to the system do not come up due to the failure mechanism.

This describes an innovative method of removing the data without needing more than the 5Vsb voltage on the planar. Other voltages may not be present because the system will not power on. The PC systems need +/- 12 Volts to power the serial bus transceivers.

This invention is a cost effective method to read TATER data from a PC mother board when the board appears to be non-functional.

The diagram below describes the method for which this data retrieval will occur. First, a ten pin COM/Serial pad layout is placed on the desired motherboard. The cost of this is virtually null. These pads are connected to the 5V data lines on the planar. Then a Transceiver Box is created to convert the 5V data lines to the standard 12V serial port lines needed for the serial data transmission to the other PC.

Transceiver

0 $ads PSMTPC with serial port

SES/TATER System

10

Pin

12V

5Vsb E...