Browse Prior Art Database

Voltage Compensated Bias Generator

IP.com Disclosure Number: IPCOM000022668D
Publication Date: 2004-Mar-25
Document File: 3 page(s) / 20K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a method for a circuit that uses common source amplifiers to take the relative measure of the supply, using a biased diode stack as a beginning voltage. Benefits include factoring out up to 40% of process variation, and 80% of voltage, temperature, and aging variations.

This text was extracted from a Microsoft Word document.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 53% of the total text.

Voltage Compensated Bias Generator

Disclosed is a method for a circuit that uses common source amplifiers to take the relative measure of the supply, using a biased diode stack as a beginning voltage. Benefits include factoring out up to 40% of process variation, and 80% of voltage, temperature, and aging variations.

Background

Legacy High-Voltage IO Buffers that use a low-voltage CMOS technology are typically accomplished using thick gate transistors. These devices need to be of secondary concern in the technology, so that their processing does not impact the performance of the thin gate devices. For this reason, thick gate devices typically have poorer performance than similar devices in past processes with similar voltage tolerances.

A typical high voltage is 3.3 volts, used in many legacy microprocessor signals in a PC (such as NMI, FERR, etc.), and for industry wide signals like AGP1, SDRAM, PCI and IDE. Circuits that support such signals suffer from variations in process, voltage, and temperature.

General Description

The disclosed method uses common source amplifiers to take the relative measure of the supply, using a biased diode stack as a beginning voltage. In Figure 1, M1-M3 are diode-connected, minimum channel length devices, biased at a minimum of roughly 50% above the threshold current; their voltage drops are mainly threshold voltage driven. The voltage at Node 1 changes by 20% of the amount the supply changes. For example, if the supply changes from 3.0v to 3.6v, (a 600mV variation), the voltage at Node 1 changes by 120mV.

The amplifiers must be tuned to provide the necessary gain and linearity, and part of that tuning occurs by selecting the best position in the diode-connected stack as the amplifier inputs. The gates of M4 and M5 are therefore assumed to be connected to Nodes 1, 2, or 3. And in general, M5 is connected to a lower position than M4.

Since there is a smaller increase at Node 1 relative to the in...