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PULSE STRETCHING CIRCUIT USING TRI-STATE DEVICES

IP.com Disclosure Number: IPCOM000023558D
Original Publication Date: 1978-Feb-28
Included in the Prior Art Database: 2004-Mar-31
Document File: 2 page(s) / 275K

Publishing Venue

Xerox Disclosure Journal

Abstract

The circuit depicted in Figure 1 is a tn-state device. When the control line C is low, the state of output line 0 will be that of input line I. When line C is high, the state of output line 0 will be at a high impedance third state.

This text was extracted from a PDF file.
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Page 1 of 2

XEROX DISCLOSURE JOURNAL

PULSE STRETCHING CIRCUIT USING
TRI-STATE DEVICES
George L. Powers

Proposed Classification
U.S. Cl. 307/106
mt. Cl. H03k 3/00

'K

0

ENABLE

                I ____________________________________
HOLD

-~4 DESIRED TIME FOR

DATA TO BE RETAINED

FIG. 3 ON DATA BITS

FIG. /

20

FIG. 2 BUS

Number 1 January/February 1978 53

Volume 3

[This page contains 1 picture or other non-text object]

Page 2 of 2

PULSE STRETCHING CIRCUIT USING TRI-STATE DEVICES (Cont'd)

The circuit depicted in Figure 1 is a tn-state device. When
the control line C is low, the state of output line 0 will be
that of input line I. When line C is high, the state of output
line 0 will be at a high impedance third state.

Referring to Figure 2, data read out of an 8-bit memory 10 is
transferred along an 8-bit memory bus 11 to respective inputs
of 8 tn-state devices 12. The control line of each device 12
is connected to a common memory bus ENABLE line 14. Thus, only
when ENABLE line 14 is low will the data on the memory bus be
applied through the devices 12 onto data bus lines 16. The
period of line 14 being low may be relatively short (e.g. 50 -

100 ,us)

In order to maintain data on the data bus 16 for a longer
period of time, the data bus lines 16 are connected to the
inputs of respective tn-state devices 18, the outputs of
which are fedback to the respective data bus line 16 and the
control lines 20 of which are connected to a common HOLD line
22. Then if the HOLD line goes low during the period that the
ENABLE line 14 is...