Browse Prior Art Database

Anti-Slip Design for Offset Die Stacking Using a Wafer-Level Redistribution Layer

IP.com Disclosure Number: IPCOM000023834D
Publication Date: 2004-Mar-31
Document File: 2 page(s) / 33K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a method that helps prevent silicon die from slipping when paste die attach materials are used to attach two pieces of silicon that are not perfectly centered over one another.

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Anti-Slip Design for Offset Die Stacking Using a Wafer-Level Redistribution Layer

Disclosed is a method that helps prevent silicon die from slipping when paste die attach materials are used to attach two pieces of silicon that are not perfectly centered over one another.

Background

Die slip has been experimentally determined to happen not only with silicon die but with other materials. Slip happens when two materials are stacked using a liquid or paste adhesives and the top piece is placed off-centered over the bottom piece (see Figure 1). Capillary forces act to re-center the top piece over the bottom piece prior to adhesive cure.

General Description

The disclosed concept involves incorporating anti-slip features on top of the silicon die to counter or slow the effect of capillary forces acting on the top silicon die (see Figure 2). These forces act to re-center the top piece of the bottom piece prior to loading the units in the oven to lock and cure the adhesive.

Advantages

The disclosed concept allows for more die attach working time before having the load the offset stacked units into the cure oven.

Fig. 1

Fig. 2

Disclosed anonymously